Patents by Inventor Yoshihiro Notani

Yoshihiro Notani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7622930
    Abstract: A method for inspecting a semiconductor device includes establishing a first circuit state in which electrical conduction through at least one of branch transmission line portions is established and electrical conduction through at least one other branch transmission line portion is prevented. Then, electrical signal reflection characteristics of the transmission line are measured. The method also includes establishing a second circuit state in which electrical conduction through the at least one of the branch transmission line portions is prevented and electrical conduction through the at least one other branch transmission line portions is established. Then, the electrical signal reflection characteristics of the transmission line are measured. The second circuit state is a mirror image of the first circuit state with respect to the primary transmission line. The measured values are compared.
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: November 24, 2009
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshihiro Notani, Hitoshi Kurusu
  • Publication number: 20080246554
    Abstract: A method for inspecting a semiconductor device includes establishing a first circuit state in which electrical conduction through at least one of branch transmission line portions is established and electrical conduction through at least one other branch transmission line portion is prevented. Then, electrical signal reflection characteristics of the transmission line are measured. The method also includes establishing a second circuit state in which electrical conduction through the at least one of the branch transmission line portions is prevented and electrical conduction through the at least one other branch transmission line portions is established. Then, the electrical signal reflection characteristics of the transmission line are measured. The second circuit state is a mirror image of the first circuit state with respect to the primary transmission line. The measured values are compared.
    Type: Application
    Filed: October 3, 2007
    Publication date: October 9, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yoshihiro Notani, Hitoshi Kurusu
  • Patent number: 7321170
    Abstract: A high frequency semiconductor device includes a semiconductor substrate, a high frequency semiconductor element on the semiconductor substrate, a high frequency signal transmission line connected at a first end to the high frequency semiconductor element, a high frequency signal input/output pad connected to a second end of the high frequency signal transmission line, the high frequency signal input/output pad extending perpendicular to the length direction of the high frequency signal transmission line, and ground potential pads on opposite longitudinal sides of the high frequency signal input/output pad.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: January 22, 2008
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshihiro Notani
  • Publication number: 20060187977
    Abstract: A high frequency semiconductor device includes a semiconductor substrate, a high frequency semiconductor element on the semiconductor substrate, a high frequency signal transmission line connected at a first end to the high frequency semiconductor element, a high frequency signal input/output pad connected to a second end of the high frequency signal transmission line, the high frequency signal input/output pad extending perpendicular to the length direction of the high frequency signal transmission line, and ground potential pads on opposite longitudinal sides of the high frequency signal input/output pad.
    Type: Application
    Filed: February 8, 2006
    Publication date: August 24, 2006
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshihiro Notani
  • Patent number: 6791335
    Abstract: In a sample assembly for a thermoelectric analyzer, typically TSC (Thermally Stimulated Current) analyzer, a sample is fixed to an electrically-insulating substrate via an adhesive layer. The material of the adhesive layer is indium or gold-tin alloy. The substrate has a pair of junction electrode layers formed thereon and a pair of electrode layers formed on the same plane of the sample. One of the electrode layers is connected with one of the junction electrode layers by electrically-conductive wire, while the other of the electrode layers is connected with the other of the junction electrode layers by another electrically-conductive wire. The substrate is made of preferably made of a highly electrically-insulating and highly thermally-conductive material which may be, for example, aluminum nitride (AlN), boron nitride (BN), beryllium oxide (BeO) or aluminum oxide (Al2O3). The sample may preferably be a compound semiconductor such as GaAs.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: September 14, 2004
    Assignees: Rigaku Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Taisei Hirayama, Masanobu Inami, Shuichi Matsuo, Koichiro Ito, Ryo Hattori, Yoshitugu Yamamoto, Yoshihiro Notani, Shinichi Miyakuni
  • Patent number: 6570390
    Abstract: A method of measuring a surface leakage current includes applying a voltage between a pair of electrodes, which are apart from each other on a sample surface, during a predetermined period of time. A region of the sample surface between the pair of electrodes is irradiated by energy rays during an irradiation period of time which is within the voltage application time. The energy rays may be lasers, ultraviolet rays, X-rays or an electron beam. A current flowing between the pair of electrodes is measured during the voltage application time. The energy rays irradiation causes a surface leakage current, which is caused by adhered substances, to start to flow, and when the adhered substances have been eliminated perfectly, a relatively large current caused by the adhered substances disappears. Perfect elimination of the adhered substances can be verified by confirming that the relatively large current has disappeared.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: May 27, 2003
    Assignees: Rigaku Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Taisei Hirayama, Koichiro Ito, Ryo Hattori, Yoshitsugu Yamamoto, Yoshihiro Notani, Shinichi Miyakuni
  • Publication number: 20020030504
    Abstract: A method of measuring a surface leakage current includes applying a voltage between a pair of electrodes, which are apart from each other on a sample surface, during a predetermined period of time. A region of the sample surface between the pair of electrodes is irradiated by energy rays during an irradiation period of time which is within the voltage application time. The energy rays may be lasers, ultraviolet rays, X-rays or an electron beam. A current flowing between the pair of electrodes is measured during the voltage application time. The energy rays irradiation causes a surface leakage current, which is caused by adhered substances, to start to flow, and when the adhered substances have been eliminated perfectly, a relatively large current caused by the adhered substances disappears. Perfect elimination of the adhered substances can be verified by confirming that the relatively large current has disappeared.
    Type: Application
    Filed: August 29, 2001
    Publication date: March 14, 2002
    Applicant: Rigaku Corporation
    Inventors: Ryo Hattori, Yoshitugu Yamamoto, Yoshihiro Notani, Shinichi Miyakuni, Taisei Hirayama, Koichiro Ito
  • Patent number: 5977631
    Abstract: A semiconductor device includes a high-frequency semiconductor chip having first and second surfaces, and including a first high-frequency transmission line on the first surface and a first grounding conductor on the second surface; and a semiconductor package having third and fourth surfaces, and including a second grounding conductor on the third surface and a second high-frequency transmission line on the fourth surface. The high-frequency semiconductor chip is mounted on the semiconductor package so that the second surface opposes the third surface. The semiconductor device further includes first and second slots for electromagnetically coupling the first high-frequency transmission line to the second high-frequency transmission line. The first and second slots on the first and second grounding conductors, respectively, oppose each other and oppose the first and second high-frequency transmission lines.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: November 2, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshihiro Notani
  • Patent number: 5808519
    Abstract: A millimeter-wave device includes a pedestal having an upper surface; a microwave IC chip operating at a millimeter wave band, the chip being mounted on the upper surface of the pedestal; line substrates having respective transmission lines connected to the microwave IC chip, the line substrates being mounted on opposite sides of the microwave IC chip on the upper surface of the pedestal; a lid covering and sealing the microwave IC chip and the line substrates, the lid being disposed opposite the upper surface of the pedestal; and waveguides, each waveguide including a waveguide input/output part having an opening penetrating the pedestal transverse to the upper surface and a waveguide end portion connected to the waveguide input/output part, the waveguides being disposed in the vicinity of opposite ends of the pedestal.
    Type: Grant
    Filed: February 28, 1997
    Date of Patent: September 15, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kei Gotoh, Yoshihiro Notani, Takayuki Katoh
  • Patent number: 5786627
    Abstract: An integrated circuit device includes a substrate, circuit elements on the substrate, and an electrically conductive thermoplastic resin substance electrically connecting the circuit elements on the substrate. Therefore, since variations in the configuration of the thermoplastic resin are quite small relative to those of interconnecting wires, variation in parasitic inductance due to variation in the configuration of the connections is reduced and the uniformity and the reproducibility of the high frequency characteristics of the integrated circuit device are enhanced. A method for fabricating an integrated circuit device includes forming circuit elements on a substrate and forming an electrically conducting thermoplastic resin substance electrically connecting the circuit elements.
    Type: Grant
    Filed: October 22, 1997
    Date of Patent: July 28, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Inoue, Kei Goto, Yoshihiro Notani, Yasuharu Nakajima, Hiroto Matsubayashi, Yukio Ohta
  • Patent number: 5767569
    Abstract: The method for mounting a semiconductor chip comprises disposing conductive thermoplastic polyimide as a bonding material between an inner lead of the TAB tape and an external connecting electrode of the semiconductor chip, applying pressure to the conductive thermoplastic polyimide by a wedge with heating by a hot stage via the semiconductor chip. The semiconductor chip comprises the external connecting electrode adhered the conductive thermoplastic polyimide. The method for fabricating the semiconductor chip comprises forming a signal line and a protective film, forming an electrode pad on the signal line not provided the protective film, forming a conductive thermoplastic polyimide layer on the semiconductor wafer by spin coating, forming a resist on the conductive thermoplastic polyimide layer and performing an etching with using the resist as a mask. The inner lead of the TAB tape is made of conductive thermoplastic polyimide, not gilded.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: June 16, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yukio Ohta, Kei Goto, Yoshihiro Notani, Yasuharu Nakajima, Akira Inoue, Hiroto Matubayashi
  • Patent number: 5675184
    Abstract: An integrated circuit device includes a substrate; circuit elements including an active element and a bias line for applying a DC bias voltage to the active element, disposed on the substrate; a thermoplastic material layer disposed on a region of the substrate; and a magnetic substance layer disposed on a region of the substrate including a region of the bias line, and adhered to and supported by the thermoplastic material layer. In this structure, the magnetic substance layer can be formed in an appropriate shape and at an appropriate position on the bias line according to the oscillation characteristics of the active element, such as a transistor, and the magnetic substance layer absorbs the frequency components of the oscillation of the active element, whereby oscillation of the active element is easily prevented.
    Type: Grant
    Filed: January 17, 1996
    Date of Patent: October 7, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiroto Matsubayashi, Kei Goto, Yoshihiro Notani, Yukio Ohta, Akira Inoue, Yasuharu Nakajima
  • Patent number: 5426319
    Abstract: A semiconductor device includes a silicon substrate on which a circuit having a predetermined function is formed and a high frequency circuit chip which is mounted on the silicon substrate and operates at high frequencies, and operates with functions of the silicon substrate and the high frequency circuit chip, wherein a thin film tape having a microstrip structure including an insulating film, a signal line on a surface of the insulating film and a grounding layer on a rear surface of the insulating film, is disposed on the silicon substrate, whereby the silicon substrate is electrically connected to the high frequency circuit chip. As a result, a conventional silicon substrate is employed and a production cost is reduced.
    Type: Grant
    Filed: April 30, 1993
    Date of Patent: June 20, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshihiro Notani
  • Patent number: 5426399
    Abstract: A film carrier signal transmission line includes a dielectric material having a first, front surface and a second, rear surface opposite the first surface, signal lines buried in the dielectric material for transmitting a super high frequency signal, spaced from the first and second surfaces, and spaced side-by-side at a regular interval; a first grounding film disposed on the second surface of the dielectric material; separating grooves in the dielectric material between adjacent pairs of signal lines, parallel to the signal lines; and second grounding films disposed on the first surface of the dielectric material and in the separating grooves and electrically connected with said first grounding film in the separating grooves. Adjacent signal lines are electrically shielded and crosstalk between signal lines is reduced.
    Type: Grant
    Filed: December 13, 1993
    Date of Patent: June 20, 1995
    Inventors: Hiroto Matsubayashi, Yasuharu Nakajima, Yoshihiro Notani
  • Patent number: 5418329
    Abstract: A high frequency IC package includes a dielectric package body having a surface, a high frequency signal transmission line and a power supply line disposed on the surface of the package body, a high frequency IC chip disposed on the surface of the package body and electrically connected to the high frequency signal transmission line and the power supply line by wires, and a lid hermetically sealing and shielding the IC chip. The lid includes a plane part parallel to the surface of the IC chip and side walls, perpendicular to the plane part, surrounding the IC chip. Since the side wall is not present on the surface of the package body but included in the lid, during the wire-bonding process of the IC chip, unfavorable contact between the cavity wall and bonding tool is avoided, reducing the lengths of bonding wires and signal transmission lines. As the result, reflection loss, conductor loss, and cavity resonance are reduced.
    Type: Grant
    Filed: June 11, 1993
    Date of Patent: May 23, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takayuki Katoh, Yoshihiro Notani
  • Patent number: 5349317
    Abstract: A high frequency signal transmission tape for connecting a plurality of high frequency IC chips to each other or connecting a high frequency IC chip to a signal transmission line disposed on a package includes an insulating thin film having a surface; a conductive signal line disposed on the surface; and two conductive grounding lines disposed on the surface on opposite sides of, parallel to, and spaced from the signal line. The signal transmission tape produces small reflection and attenuation of signals in an extremely high frequency band, i.e., a millimeter-wave frequency band over 30 GHz. Therefore, high frequency IC chips arbitrarily arranged on a package are easily connected using the high frequency signal transmission tape.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: September 20, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshihiro Notani, Takayuki Katoh
  • Patent number: 5302554
    Abstract: According to a method for producing semiconductor chips, grooves serving as dicing lines are formed in a front surface of a semiconductor wafer, the semiconductor wafer is ground from the rear surface to a prescribed thickness, leaving portions of the wafer opposite the grooves, a feeding layer is formed on the ground rear surface of the wafer, a metal layer for heat radiation is formed on the feeding layer, a dicing tape is applied to the metal layer, and the wafer and the feeding layer are diced along the dicing lines, resulting in a plurality of semiconductor chips. Therefore, the strength of the wafer is increased because portions of the wafer remain at the dicing lines, preventing curvature of the wafer.
    Type: Grant
    Filed: August 11, 1992
    Date of Patent: April 12, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takuo Kashiwa, Takahide Ishikawa, Yoshihiro Notani
  • Patent number: 5294897
    Abstract: A surface mountable microwave IC package includes a dielectric substrate; a ground conductor disposed on a front surface of a dielectric substrate on which a microwave IC chip is disposed and grounded; and a transmission line for connecting the microwave IC chip to a coplanar line on a package substrate outside the microwave IC package. The upper coplanar line is disposed on the front surface of the dielectric substrate and includes the ground conductor on which the IC chip is disposed. The lower coplanar line is disposed on the rear surface of the dielectric substrate. The intermediate coplanar line penetrates through the dielectric substrate and connects the upper coplanar line to the lower coplanar line. Therefore, the microwave transmission path from the package substrate to the IC chip is a coplanar transmission line so that a continuous transmission mode is maintained through the microwave transmission path.
    Type: Grant
    Filed: December 24, 1992
    Date of Patent: March 15, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshihiro Notani, Takayuki Katoh