Patents by Inventor Yoshihiro Shimosawa

Yoshihiro Shimosawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070061654
    Abstract: A semiconductor integrated circuit includes a memory that operates in synchronization with a first clock and a built-in self-test (BIST) circuit for testing the memory. The BIST circuit includes a test data output circuit for outputting test data as input test data to the memory in synchronization with a second clock, an input circuit for receiving output data from the memory in synchronization with a third clock, and a phase shifter for shifting a phase of the first clock and generating the second clock and the third clock.
    Type: Application
    Filed: August 14, 2006
    Publication date: March 15, 2007
    Inventor: Yoshihiro Shimosawa