Patents by Inventor Yoshihiro Sugita

Yoshihiro Sugita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240069457
    Abstract: The toner contains binder resin-containing toner particles and silica fine particle S1, wherein the weight-average particle diameter of the toner is 4.0-15.0 ?m, both inclusive, peaks originating with the silica fine particle S1 are observed in 29 Si-NMR measurement of the silica fine particle S1, and, in the spectrum obtained by 29Si CP/MAS NMR or 29Si DD/MAS NMR, the peak area of a peak corresponding to the D1 unit structure in the silica fine particle S1, the peak area of a peak corresponding to the D2 unit structure in the silica fine particle S1, and the peak area of a peak corresponding to the Q unit structure in the silica fine particle S1 satisfy a prescribed relationship.
    Type: Application
    Filed: October 25, 2023
    Publication date: February 29, 2024
    Inventors: RYUJI MURAYAMA, SHIN KITAMURA, TORU TAKAHASHI, DAISUKE TSUJIMOTO, RYUICHIRO MATSUO, HITOSHI SANO, NOBUYUKI FUJITA, SHUJI YAMADA, YUKA GUNJI, TAKAKUNI KOBORI, YOSHIHIRO OGAWA, ATSUHIKO OHMORI, HIROKI KAGAWA, KEISUKE ADACHI, TOMOKO SUGITA
  • Publication number: 20230292965
    Abstract: An abnormality detection system according to an embodiment has an acquisition unit that acquires information that indicates a tendency of a usage state of one use item that is provided as an item for use that is executed by a user of a toilet, and a determination unit that determines that an abnormality concerning the one use item occurs in a case where a tendency of the usage state of the one use item is separated from a use tendency of the one use item in past.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 21, 2023
    Inventors: Tetsuhiro Wasada, Yoshihiro Sugita, Miho Otake, Shoma Morishita, Koki Nomura, Masamichi Tosaki, Hiroshi Tsuboi
  • Patent number: 7521325
    Abstract: A permeation preventing film of a silicon nitride film 16 is inserted between a silicon substrate 10 and a High-k gate insulation film 18 to thereby prevent the High-k gate insulation film 18 from being deprived of oxygen, while oxygen anneal is performed after a gate electrode layer 20 has been formed to thereby supplement oxygen. The silicon nitride film 16, which is the permeation preventing film, becomes a silicon oxide nitride film 17 without changing the film thickness, whereby characteristics deterioration of the High-k gate insulation film 18 due to the oxygen loss can be prevented without lowering the performance of the transistor. The semiconductor device having the gate insulation film formed of even a high dielectric constant material can be free from the shift of the threshold voltage.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: April 21, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Tsunehisa Sakoda, Masaomi Yamaguchi, Hiroshi Minakata, Yoshihiro Sugita, Kazuto Ikeda
  • Patent number: 7514316
    Abstract: A p-well (12) is formed on a surface of an Si substrate (11) and element isolation insulating films (13) are formed. Next, a thin SiO2 film (14a) is formed on the whole surface, and an oxide film containing a rare earth metal (for example, lanthanum (La) or yttrium (Y)) and aluminum (Al) is formed thereon as an insulating film (14b). Furthermore, a polysilicon film (15) is formed on the insulating film (14b). After that, the SiO2 film (14a) and the insulating film (14b) are allowed to react with each other by performing a heat treatment, for example, at approximately 1000° C. to form a silicate film containing the rare earth metal and Al. In a word, the SiO2 film (14a) and the insulating film (14b) are allowed to be a single silicate film.
    Type: Grant
    Filed: May 20, 2005
    Date of Patent: April 7, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Yoshihiro Sugita
  • Publication number: 20060214243
    Abstract: A permeation preventing film of a silicon nitride film 16 is inserted between a silicon substrate 10 and a High-k gate insulation film 18 to thereby prevent the High-k gate insulation film 18 from being deprived of oxygen, while oxygen anneal is performed after a gate electrode layer 20 has been formed to thereby supplement oxygen. The silicon nitride film 16, which is the permeation preventing film, becomes a silicon oxide nitride film 17 without changing the film thickness, whereby characteristics deterioration of the High-k gate insulation film 18 due to the oxygen loss can be prevented without lowering the performance of the transistor. The semiconductor device having the gate insulation film formed of even a high dielectric constant material can be free from the shift of the threshold voltage.
    Type: Application
    Filed: July 28, 2005
    Publication date: September 28, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Tsunehisa Sakoda, Masaomi Yamaguchi, Hiroshi Minakata, Yoshihiro Sugita, Kazuto Ikeda
  • Patent number: 6998303
    Abstract: An insulating film made of zirconia or hafnia is formed on the surface of a semiconductor substrate. A partial surface area of the insulating film is covered with a mask pattern. By using the mask pattern as a mask, ions are implanted into a region of the insulating film not covered with the mask pattern to give damages to the insulating film. By using the mask pattern as a mask, a portion of the insulating film is etched.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: February 14, 2006
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Sugita, Yusuke Morisaki, Kiyoshi Irino, Shiqin Xiao, Takayuki Ohba
  • Publication number: 20050208719
    Abstract: A p-well (12) is formed on a surface of an Si substrate (11) and element isolation insulating films (13) are formed. Next, a thin SiO2 film (14a) is formed on the whole surface, and an oxide film containing a rare earth metal (for example, lanthanum (La) or yttrium (Y)) and aluminum (Al) is formed thereon as an insulating film (14b). Furthermore, a polysilicon film (15) is formed on the insulating film (14b). After that, the SiO2 film (14a) and the insulating film (14b) are allowed to react with each other by performing a heat treatment, for example, at approximately 1000° C. to form a silicate film containing the rare earth metal and Al. In a word, the SiO2 film (14a) and the insulating film (14b) are allowed to be a single silicate film.
    Type: Application
    Filed: May 20, 2005
    Publication date: September 22, 2005
    Applicant: FUJITSU LIMITED
    Inventor: Yoshihiro Sugita
  • Publication number: 20050170665
    Abstract: A method of forming a high-K dielectric film by the MOCVD method using an amine-based organic metal compound precursor is disclosed. According to the present method, a precursor gas including organic metal compound molecules of the amine-based organic metal compound precursor is supplied to a processing space that accommodates a substrate to be processed, the surface of the substrate being exposed so that the amine-base organic metal compound molecules are chemically adsorbed onto the surface of the substrate. Then, a hydrogen gas is supplied to the surface of the substrate, and an oxidization gas is introduced into the processing space to thereby form the high-K dielectric film on the surface of the substrate.
    Type: Application
    Filed: April 5, 2005
    Publication date: August 4, 2005
    Applicant: FUJITSU LIMITED
    Inventor: Yoshihiro Sugita
  • Patent number: 6894369
    Abstract: An ultra high-speed semiconductor device has a high-K dielectric gate insulator layer, wherein spread of impurities to a Si substrate from a gate electrode through the high-K dielectric gate insulator layer, and spread of oxygen and metallic elements from the high-K dielectric gate insulator layer to the Si substrate or the gate electrode are suppressed by arranging the high-K dielectric film sandwiched by nitrogen atomic layers on the Si substrate that is covered by an oxygen atomic layer.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: May 17, 2005
    Assignee: Fujitsu Limited
    Inventors: Kiyoshi Irino, Yusuke Morisaki, Yoshihiro Sugita, Yoshiaki Tanida, Yoshihisa Iba
  • Publication number: 20040253450
    Abstract: This invention provides a process for electroless copper plating without using formaldehyde and an electroless copper plating solution which is used in the process. To this end, there is disclosed a process for electroless copper plating, which treatment comprises depositing a palladium or palladium-tin catalyst on a resin substrate, and then treating said resin substrate having the catalyst deposited thereon with a formaldehyde-free electroless copper plating solution that contains copper ions and a reducing agent, wherein the need for an accelerating treatment of a catalyst after said catalyst depositing treatment is obviated. The productivity of a copper-resin composite material is dramatically enhanced by the process of the present invention, because a copper thin layer can be formed on the resin substrate in a short time, even if an accelerating treatment for a catalyst is not performed in a separate process.
    Type: Application
    Filed: October 29, 2003
    Publication date: December 16, 2004
    Applicant: Shipley Company, L.L.C.
    Inventors: Masaru Seita, Hideki Tsuchida, Masaaki Imanari, Yoshihiro Sugita, Andre Egli, William Brasch
  • Patent number: 6780699
    Abstract: A semiconductor device in which the insulation characteristics of an insulating film of multilayer structure including a lower-layer insulating film and a high-dielectric-constant film formed on the lower-layer insulating film are ensured, and a method for fabricating such a semiconductor device. A silicon oxide film or a silicon oxynitride film is formed on a semiconductor substrate as a lower-layer insulating film and part of the lower-layer insulating film is removed. Then a high-dielectric-constant film the dielectric constant of which is higher than that of the lower-layer insulating film is formed on the exposed semiconductor substrate and the lower-layer insulating film. If the lower-layer insulating film is a silicon oxide film, then a metallic compound not including chlorine is used for forming this high-dielectric-constant film. If the lower-layer insulating film is a silicon oxynitride film, then a metallic chloride can be used for forming this high-dielectric-constant film.
    Type: Grant
    Filed: February 6, 2003
    Date of Patent: August 24, 2004
    Assignee: Fujitsu Limited
    Inventors: Yasuyuki Tamura, Yusuke Morisaki, Yoshihiro Sugita, Kiyoshi Irino, Takayuki Aoyama, Chikako Yoshida, Yoshihiro Sugiyama, Hitoshi Tanaka, Kanetake Takasaki
  • Patent number: 6740425
    Abstract: A method for forming copper-resin composite materials is disclosed. This method affixes a palladium or palladium-tin catalyst onto resin substrate, and then subjects the catalyst-containing resin to an electroless copper plating bath without performing a catalyst acceleration treatment step.
    Type: Grant
    Filed: August 21, 2002
    Date of Patent: May 25, 2004
    Assignee: Shipley Company, L.L.C.
    Inventors: Masaru Seita, Hideki Tsuchida, Masaaki Imanari, Yoshihiro Sugita
  • Publication number: 20040038555
    Abstract: An insulating film made of zirconia or hafnia is formed on the surface of a semiconductor substrate. A partial surface area of the insulating film is covered with a mask pattern. By using the mask pattern as a mask, ions are implanted into a region of the insulating film not covered with the mask pattern to give damages to the insulating film. By using the mask pattern as a mask, a portion of the insulating film is etched.
    Type: Application
    Filed: August 5, 2003
    Publication date: February 26, 2004
    Applicant: Fujitsu Limited
    Inventors: Yoshihiro Sugita, Yusuke Morisaki, Kiyoshi Irino, Shiqin Xiao, Takayuki Ohba
  • Publication number: 20030168697
    Abstract: A semiconductor device in which the insulation characteristics of an insulating film of multilayer structure including a lower-layer insulating film and a high-dielectric-constant film formed on the lower-layer insulating film are ensured, and a method for fabricating such a semiconductor device. A silicon oxide film or a silicon oxynitride film is formed on a semiconductor substrate as a lower-layer insulating film and part of the lower-layer insulating film is removed. Then a high-dielectric-constant film the dielectric constant of which is higher than that of the lower-layer insulating film is formed on the exposed semiconductor substrate and the lower-layer insulating film. If the lower-layer insulating film is a silicon oxide film, then a metallic compound not including chlorine is used for forming this high-dielectric-constant film. If the lower-layer insulating film is a silicon oxynitride film, then a metallic chloride can be used for forming this high-dielectric-constant film.
    Type: Application
    Filed: February 6, 2003
    Publication date: September 11, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yasuyuki Tamura, Yusuke Morisaki, Yoshihiro Sugita, Kiyoshi Irino, Takayuki Aoyama, Chikako Yoshida, Yoshihiro Sugiyama, Hitoshi Tanaka, Kanetake Takasaki
  • Publication number: 20030066754
    Abstract: A method for forming copper-resin composite materials is disclosed. This method affixes a palladium or palladium-tin catalyst onto resin substrate, and then subjects the catalyst-containing resin to an electroless copper plating bath without performing a catalyst acceleration treatment step.
    Type: Application
    Filed: August 21, 2002
    Publication date: April 10, 2003
    Applicant: Shipley Company, L.L.C.
    Inventors: Masaru Seita, Hideki Tsuchida, Masaaki Imanari, Yoshihiro Sugita
  • Publication number: 20030003667
    Abstract: A method includes the steps of forming a gate insulating film on a monocrystalline silicon substrate, forming a conductive film on the gate insulating film, and processing at least the conductive film to form a gate electrode. The gate insulating film is made up from an aluminum oxide film about 1 nm thick deposited on the monocrystalline silicon substrate by CVD, a hafnium oxide film about 4 nm thick deposited on the aluminum oxide film by CVD, and another aluminum oxide film about 1 nm thick deposited on the hafnium oxide film by CVD under the same formation conditions as the former aluminum oxide film.
    Type: Application
    Filed: May 21, 2002
    Publication date: January 2, 2003
    Applicant: Fujitsu Limited
    Inventors: Yusuke Morisaki, Yoshihiro Sugita, Kiyoshi Irino
  • Publication number: 20020146916
    Abstract: An ultra high-speed semiconductor device has a high-K dielectric gate insulator layer, wherein spread of impurities to a Si substrate from a gate electrode through the high-K dielectric gate insulator layer, and spread of oxygen and metallic elements from the high-K dielectric gate insulator layer to the Si substrate or the gate electrode are suppressed by arranging the high-K dielectric film sandwiched by nitrogen atomic layers on the Si substrate that is covered by an oxygen atomic layer.
    Type: Application
    Filed: March 29, 2002
    Publication date: October 10, 2002
    Inventors: Kiyoshi Irino, Yusuke Morisaki, Yoshihiro Sugita, Yoshiaki Tanida, Yoshihisa Iba
  • Patent number: 5157582
    Abstract: A surface-mountable composite electronic part comprising a capacitor element which includes a dielectric ceramic member and a film resistor combined therewith for forming an RC circuit. A plurality of external terminals are formed on both end surfaces of the capacitor element for extracting capacitance, while a plurality of wiring patterns are formed on a first major surface of the capacitor element to be connected with the external terminals. The film resistor is formed on the first major surface of the capacitor element on a protective film made of a glass material, and connects a pair of the wiring patterns with each other. When the film resistor is trimmed with a laser beam, the protective film prevents the dielectric ceramic member forming the capacitor element from being harmed by the laser beam.
    Type: Grant
    Filed: June 20, 1991
    Date of Patent: October 20, 1992
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoshihiro Sugita, Masami Iwahara