Abstract: A portable terminal includes a finger sensor that recognizes, in response to contact of a finger, the contact and a movement of the finger; and a conversion unit that converts the movement of the finger recognized by the finger sensor into an input event corresponding to an operation instruction to an application running on the portable terminal. If a period of time from recognition of release of the finger from the finger sensor to recognition of placement of the finger on the finger sensor is less than a predetermined amount of time corresponding to physical limitations of a human, the conversion unit does not convert to the input event the recognition of placement of the finger, and recognition of a movement of the finger until recognition of release of the finger after the recognition of placement of the finger.

Abstract: An information processing apparatus includes a fingerprint sensor that detects movement of a finger, and a transforming unit that transforms the movement of the finger detected by the fingerprint sensor into an input event corresponding to an operational instruction to an application that runs on the information processing apparatus. When an amount of movement of the finger detected by the fingerprint sensor is greater than a threshold for the amount of movement, the transforming unit inhibits transformation of the movement of the finger detected by the fingerprint sensor into the input event.

Abstract: A portable terminal includes a finger sensor that recognizes, in response to contact of a finger, the contact and a movement of the finger; and a conversion unit that converts the movement of the finger recognized by the finger sensor into an input event corresponding to an operation instruction to an application running on the portable terminal. If a period of time from recognition of release of the finger from the finger sensor to recognition of placement of the finger on the finger sensor is less than a predetermined amount of time corresponding to physical limitations of a human, the conversion unit does not convert to the input event the recognition of placement of the finger, and recognition of a movement of the finger until recognition of release of the finger after the recognition of placement of the finger.

Abstract: An information processing apparatus includes a fingerprint sensor that detects movement of a finger, and a transforming unit that transforms the movement of the finger detected by the fingerprint sensor into an input event corresponding to an operational instruction to an application that runs on the information processing apparatus. When an amount of movement of the finger detected by the fingerprint sensor is greater than a threshold for the amount of movement, the transforming unit inhibits transformation of the movement of the finger detected by the fingerprint sensor into the input event.

Abstract: A data transfer apparatus improving data transfer rate regardless of the original transfer mode in a USB interface is disclosed. A computer includes a bulk packet generation unit and an isochronous packet transmission unit. The bulk packet generation unit generates a bulk packet (or a control packet) which is a USB packet and has a predetermined structure including a first data area by describing data which is taken as an object of transfer in the first data area. The isochronous packet transmission unit generates an isochronous packet which is a packet in USB isochronous transfer and has a predetermined structure including a second data area by incorporating at least one bulk packet into the second data area, and isochronously transfers the isochronous packet to the mobile telephone over the USB interface.

Abstract: An access-request control method of controlling an access request from an application to a communication device, to which at least a general-purpose port is allocated, that performs a communication via a communication network in response to the access request, includes permitting a utilization of the communication device prior to the access request from the application; and controlling whether to accept the access request to the communication device from the application, based on a permission status for the utilization of the communication device.

Abstract: A protocol conversion apparatus for converting a communication system (e.g. a USB scheme and a PDC scheme) is disposed between for example, a personal computer (PC) and a portable telephone (MS). A radio protocol packet is covered with USB protocol header/footer in its entirety, or the USB protocol header/footer is removed simply to generate the radio protocol packet.

Abstract: A data transfer apparatus improving data transfer rate regardless of the original transfer mode in a USB interface is disclosed. A computer includes a bulk packet generation unit and an isochronous packet transmission unit. The bulk packet generation unit generates a bulk packet (or a control packet) which is a USB packet and has a predetermined structure including a first data area by describing data which is taken as an object of transfer in the first data area. The isochronous packet transmission unit generates an isochronous packet which is a packet in USB isochronous transfer and has a predetermined structure including a second data area by incorporating at least one bulk packet into the second data area, and isochronously transfers the isochronous packet to the mobile telephone over the USB interface.

Abstract: An access-request control method of controlling an access request from an application to a communication device, to which at least a general-purpose port is allocated, that performs a communication via a communication network in response to the access request, includes permitting a utilization of the communication device prior to the access request from the application; and controlling whether to accept the access request to the communication device from the application, based on a permission status for the utilization of the communication device.

Abstract: The present invention aims to provide a device having a common essential component, for example, a common LSI, and a host machine having a common device driver. A USB device 10 has a plug-and-play capability that allows the device 10, upon being connected to a PC 15, to pass to the PC 15 device ID 11a or 11b for selecting a device driver 16 that controls the device 10 and operates under the control of the device driver 16 provided in the PC 15. The device has an LSI 12 retaining two selectable device IDs 11a and 11b.

Abstract: A memory controlling device is controlled by a CPU to enable information to be read from memory when the memory starts an operation. The memory is capable of retaining data during a power off state and the data is loaded when the memory starts an operation.

Abstract: A buffer access control circuit to access a buffer which is divided into an upper buffer and a lower buffer which are assigned the same address and a memory unit including the buffer access control circuit. The buffer access control circuit includes latch circuits which store data in response to upper and lower buffer access signals, and a first detection circuit which detects whether data latched by the latch circuits match. A modifying circuit inputs data to the first and second latches or inputs inverted data to the first and second latches when one of the upper and lower buffer access signals is generated and the detection circuit detects a match. In this manner, the buffer access control circuit is used to update an address one by one, without the use of a delay circuit when consecutively accessing the upper and lower buffers.

Abstract: A memory card realizes two interface standards. The memory card includes an input terminal receiving a grounded or open-circuited signal from a host unit when using the memory card in conformance with a first interface standard, and receiving a binary signal from the host unit when using the memory card in conformance with a second interface standard, a first circuit acquiring standard information which indicates the first or second interface standard, from a signal issued from the host unit, a second circuit outputting a high-level voltage when using the memory card in conformance with the first interface standard and outputting a high-impedance signal when using the memory card in conformance with the second interface standard, depending on the standard information acquired by the first circuit, and a resistor coupling an output of the second circuit and the input terminal.

Abstract: A buffer access control circuit to access a buffer which is divided into an upper buffer and a lower buffer which are assigned the same address and a memory unit including the buffer access control circuit. The buffer access control circuit includes latch circuit which store data in response to upper and lower buffer access signals, and a first detection circuit which detects whether data latched by the latch circuits match. A modifying circuit inputs data to the first and second latches or inputs inverted data to the first and second latches when one of the upper and lower buffer access signals is generated and the detection circuit detects a match.

Abstract: A circuit for enabling a chip, usable for both a first device capable of having m chips and a second device having more than m chips, includes a first generation unit which generates a chip-enable signal that includes a bit pattern of m bits for enabling one of the m chips indicated by a chip number, a second generation unit which generates a chip-enable generation signal that is to be decoded into a chip-enable signal of at least 2m bits for enabling one of the more than m chips indicated by the chip number, the chip-enable generation signal including a bit pattern identical to the bit pattern of m bits when the chip number is equal to a specific number, and a selection unit which selects and outputs the chip-enable signal generated by the first generation unit when the circuit is used for the first device, and selects and outputs the chip-enable generation signal generated by the second generation unit when the circuit is used for the second device.

Abstract: A buffer access control circuit to access a buffer which is divided into an upper buffer and a lower buffer which are assigned the same address and a memory unit including the buffer access control circuit. The buffer access control circuit includes latch circuits which store data in response to upper and lower buffer access signals, and a first detection circuit which detects whether data latched by the latch circuits match. A modifying circuit inputs data to the first and second latches or inputs inverted data to the first and second latches when one of the upper and lower buffer access signals is generated and the detection circuit detects a match. In this manner, the buffer access control circuit is used to update an address one by one, without the use of a delay circuit when consecutively accessing the upper and lower buffers.

Abstract: A circuit for enabling a chip, usable for both a first device capable of having m chips and a second device having more than m chips, includes a first generation unit which generates a chip-enable signal that includes a bit pattern of m bits for enabling one of the m chips indicated by a chip number, a second generation unit which generates a chip-enable generation signal that is to be decoded into a chip-enable signal of at least 2m bits for enabling one of the more than m chips indicated by the chip number, the chip-enable generation signal including a bit pattern identical to the bit pattern of m bits when the chip number is equal to a specific number, and a selection unit which selects and outputs the chip-enable signal generated by the first generation unit when the circuit is used for the first device, and selects and outputs the chip-enable generation signal generated by the second generation unit when the circuit is used for the second device.

Abstract: A semiconductor memory device has a memory space which includes blocks and each of the blocks includes sectors. The sectors have a data storing region and a flag region. Data stored in a sector is marked as valid or erased, depending on the flags in the flag region. If an even number of the flags in the flag region have a logical value of 1, the data is considered to be erased. The data in each sector may be erased and unerased a number of times, by sequentially altering the value of the flags in the flag region. Data stored in the memory may be erased on a sector-by-sector basis.

Abstract: An image forming apparatus includes a fixing unit having a heat source, a temperature detecting unit for detecting a temperature of the fixing unit, an initial operation necessity detecting unit for determining whether an initial operation should be performed in the image forming apparatus, an initial operation selecting control unit for selecting an initial operation from among a plurality of predetermined initial operations based on the temperature detected by the temperature detecting unit when the initial operation necessity detecting unit detects that the initial operation should be performed, and a control unit for controlling the fixing unit so that the fixing unit performs the initial operation selected by the initial operation selecting control unit.

Abstract: An image forming apparatus includes a fixing unit having a heat source, a temperature detecting unit for detecting a temperature of the fixing unit, an initial operation necessity detecting unit for determining whether an initial operation should be performed in the image forming apparatus, an initial operation selecting control unit for selecting an initial operation from among a plurality of predetermined initial operations based on the temperature detected by the temperature detecting unit when the initial operation necessity detecting unit detects that the initial operation should be performed, and a control unit for controlling the fixing unit so that the fixing unit performs the initial operation selected by the initial operation selecting control unit.