Patents by Inventor Yoshihisa Fujii

Yoshihisa Fujii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5387804
    Abstract: A light emitting diode is disclosed which comprises at least one heterojunction composed of silicon carbide (SIC) and semiconductor materials selected from the group consisting of gallium nitride (GAN), aluminum nitride (AlN), and aluminum gallium nitride (Ga.sub.x Al.sub.1-x N, 0<x<1).
    Type: Grant
    Filed: September 14, 1992
    Date of Patent: February 7, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa, Mitsuhiro Shigeta, Yoshihisa Fujii
  • Patent number: 5329141
    Abstract: A light emitting diode of silicon carbide having a p-n junction comprising an n-type layer doped with donor impurities, a first p-type layer doped with acceptor impurities, and a second p-type layer doped with acceptor impurities and donor impurities. The first p-type layer has a thickness less than the diffusion length of electrons having flowed from the n-type layer. In this way, the first p-type layer effects light emission related to the acceptor impurities which recombine with the electrons having flowed from the n-type layer, and the second p-type layer effects light emission by donor-acceptor pairs which recombine with the electrons having flowed from the n-type layer.
    Type: Grant
    Filed: October 30, 1992
    Date of Patent: July 12, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Yoshihisa Fujii, Hajime Saito, Katsuki Furukawa, Yoshimitsu Tajima
  • Patent number: 5319220
    Abstract: A silicon carbide semiconductor device is provided which includes at least one heterojunction composed of two different polytypes of silicon carbide. The two polytypes of silicon carbide in the heterojunction include a .beta.-type silicon carbide layer having an .alpha.-type silicon carbide layer disposed thereon.
    Type: Grant
    Filed: June 8, 1992
    Date of Patent: June 7, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa, Mitsuhiro Shigeta, Yoshihisa Fujii, Atsuko Ogura
  • Patent number: 5313078
    Abstract: This invention is a multi-layer pn type silicon carbide light emitting diode. A first n-type silicon carbide layer is deposited on an n-type substrate. The first n-type silicon carbide layer has an electron concentration larger than 1.times.10.sup.15 cm.sup.-3 and smaller than the electron concentration of the substrate and has a thickness of between 0.1 to 20 .mu.m. A second n-type silicon carbide layer is disposed over the first n-type layer. A first p-type silicon carbide layer is disposed on the second n-type layer to form a PN junction layer.
    Type: Grant
    Filed: December 2, 1992
    Date of Patent: May 17, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Fujii, Hajime Saito, Akira Suzuki
  • Patent number: 5279701
    Abstract: A method for the growth of silicon carbide single crystals is disclosed which includes the step of growing silicon carbide single crystals on a silicon single-crystal substrate. The silicon single-crystal substrate has growth areas with a crystal orientation inclined by an angle .theta. from the [100] direction toward at least one of the [011] and [011] directions and with a lateral dimension d taken along the direction of such inclination toward the [011] or [011] direction. The angle .theta. is set to be in the range of zero to tan.sup.-1 (.sqroot.2/8) degrees (with the proviso that the angle .theta. is not equal to tan.sup.-1 (.sqroot.2/2) degrees). The lateral dimension d is set to be in the range of 0.1 to 100 .mu.m. In this method, the silicon carbide single crystals are grown to a thickness t approximately equal to or greater than (.sqroot.2+tan.theta.)d/.vertline.1-.sqroot.2tan.theta..vertline., so that these silicon carbide single crystals are substantially free of defects such as stacking faults.
    Type: Grant
    Filed: August 24, 1992
    Date of Patent: January 18, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mitsuhiro Shigeta, Akira Suzuki, Katsuki Furukawa, Yoshihisa Fujii
  • Patent number: 5243204
    Abstract: There are provided silicon carbide light emitting diodes having a p-n junction which is constituted by a p-type silicon carbide single-crystal layer and an n-type silicon carbide single-crystal layer formed thereon. In cases where light emission caused by recombination of free excitons is substantially utilized, at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 5.times.10.sup.16 cm.sup.-3 or lower. In cases where light emission caused by acceptor-associated recombination is substantially utilized, the p-type silicon carbide layer is doped with an acceptor impurity and at least a part of the n-type silicon carbide layer adjacent to the interface of the p-n junction is doped with a donor impurity at a concentration of 1.times.10.sup.18 cm.sup.-3 or higher. Also provided are a method for producing such silicon carbide light emitting diodes and a method for producting another silicon carbide light emitting diode.
    Type: Grant
    Filed: May 17, 1991
    Date of Patent: September 7, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa, Yoshihisa Fujii
  • Patent number: 5230768
    Abstract: There is provided a method for the production of a silicon carbide single crystal, which includes the steps of: providing a silicon single-crystal substrate having a growth plane with a crystal orientation inclined from the [100] direction toward an off-direction, wherein the crystal orientation is defined by a deviation angle .theta. of 5 to 40 degrees, as measured from the [011] direction toward the [011] direction, and a tilt angle .phi. of 1 to 7 degrees, as measured from the [100] direction toward the off-direction; and growing a silicon carbide single crystal on the substrate.
    Type: Grant
    Filed: February 28, 1992
    Date of Patent: July 27, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsuki Furukawa, Akira Suzuki, Yoshihisa Fujii
  • Patent number: 5216264
    Abstract: A silicon carbide field-effect transistor is disclosed which includes an MOS structure composed successively of a silicon carbide layer, a gate insulator film, and a gate electrode. The field-effect transistor has source and drain regions formed in the silicon carbide layer, between which the MOS structure is disposed, wherein at least one of the source and drain regions is formed by the use of a Schottky contact on the silicon carbide layer.
    Type: Grant
    Filed: September 16, 1991
    Date of Patent: June 1, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Fujii, Akira Suzuki, Katsuki Furukawa, Mitsuhiro Shigeta
  • Patent number: 5184199
    Abstract: A silicon carbide semiconductor device is disclosed which includes a semiconductor substrate and a silicon carbide single-crystal layer formed above the substrate, the silicon carbide single-crystal layer having a device active region. The silicon carbide semiconductor device further includes an aluminum nitride single-crystal layer which is disposed between the silicon carbide single-crystal layer and the substrate. The aluminum nitride single-crystal layer functions as an electrically insulating layer by which the silicon carbide signale-crystal layer is isolated electrically from the substrate.
    Type: Grant
    Filed: June 5, 1990
    Date of Patent: February 2, 1993
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Fujii, Akira Suzuki, Katsuki Furukawa, Mitsuhiro Shigeta
  • Patent number: 5170231
    Abstract: A silicon carbide field-effect transistor is provided which includes a semiconductor substrate, a channel formation layer of silicon carbide formed above the substrate, source and drain regions provided in contact with the channel formation layer, a gate insulator disposed between the source and drain regions, and a gate electrode formed on the gate insulator, wherein a first contact between the channel formation layer and the drain region exhibits different electric characteristics from those of a second contact between the channel formation layer and the source region. Also provided is a method for producing such a silicon carbide field-effect transistor.
    Type: Grant
    Filed: May 24, 1991
    Date of Patent: December 8, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Fujii, Akira Suzuki, Katsuki Furukawa
  • Patent number: 5135885
    Abstract: A method of manufacturing a semiconductor device comprises the steps of (i) forming a SiC monocrystal layer over the entire surface of a semiconductor substrate; (ii) forming a boron ion implanted layer, which is substantially a thin film, by implanting a specified amount of boron ions in the surface region of the SiC monocrystal layer; and (iii) forming a high resistance SiC monocrystal layer of a thin film by subjecting the boron ion implanted layer to heat treatment; whereby the high resistance SiC monocrystal layer can be function at least as an electric insulating layer.
    Type: Grant
    Filed: March 27, 1990
    Date of Patent: August 4, 1992
    Assignee: Sharp Corporation
    Inventors: Katsuki Furukawa, Yoshihisa Fujii, Mitsuhiro Shigeta, Akira Suzuki
  • Patent number: 5124779
    Abstract: A silicon carbide semiconductor device is disclosed which includes a silicon carbide single-crystal layer and at least one ohmic electrode in contact with the silicon carbide single-crystal layer, wherein the ohmic electrode is made of a titanium-aluminum alloy. Also disclosed is a method of producing the silicon carbide semiconductor device.
    Type: Grant
    Filed: October 17, 1990
    Date of Patent: June 23, 1992
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsuki Furukawa, Akira Suzuki, Yoshihisa Fujii
  • Patent number: 5063421
    Abstract: A silicon carbide light emitting diode having a pn junction is disclosed which comprises a semiconductor substrate, a first silicon carbide single-crystal layer of one conductivity formed on the substrate, and a second silicon carbide single-crystal layer of the opposite conductivity formed on the first silicon carbide layer, the first and second silicon carbide layers constituting the pn junction, wherein at least one of the first and second silicon carbide layers contains a tetravalent transition element as a luminescent center.
    Type: Grant
    Filed: August 7, 1989
    Date of Patent: November 5, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akira Suzuki, Katsuki Furukawa, Mitsuhiro Shigeta, Yoshihisa Fujii
  • Patent number: 5049950
    Abstract: A MIS structure is provided which uses a photoconductive amorphous silicon carbide layer as an insulator layer in the MIS structure. The insulator layer is disposed on an n-type layer of single crystal silicon carbide and a translucent metal layer is disposed thereon. The metal layer is biased with a negative voltage so that the capacitance between the metal layer and the semiconductor layer changes in response to whether on the metal layer is illuminated with light.
    Type: Grant
    Filed: August 9, 1990
    Date of Patent: September 17, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshihisa Fujii, Mitsuhiro Shigeta, Katsuki Furukawa, Kenji Nakanishi, Atsuko Ogura
  • Patent number: 5030580
    Abstract: A method for producing a silicon carbide semiconductor device having at least one of the p-type conductive layer and the n-type conductive layer is disclosed which includes the steps of: forming a silicon carbide single-crystal layer on a semiconductor substrate or semiconductor bulk single crystal; and implanting the III group of V group element ions in combination with fluorine ions in the silicon carbide single-crystal layer to form a p-type or n-type conductive layer, respectively.
    Type: Grant
    Filed: August 23, 1990
    Date of Patent: July 9, 1991
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsuki Furukawa, Akira Suzuki, Yoshihisa Fujii
  • Patent number: 4865659
    Abstract: A heteroepitaxial growth method comprising growing a semiconductor single-crystal film on a semiconductor single-crystal substrate with a lattice constant different from that of the semiconductor single-crystal film by chemical vapor deposition, the epitaxial orientation of the semiconductor single-crystal film being inclined at a certain angle with respect to the semiconductor single-crystal substrate.
    Type: Grant
    Filed: November 24, 1987
    Date of Patent: September 12, 1989
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Mitsuhiro Shigeta, Akira Suzuki, Katsuki Furukawa, Yoshihisa Fujii, Akitsugu Hatano, Atsuko Uemoto, Kenji Nakanishi
  • Patent number: 4258318
    Abstract: A detector for magnetically detecting flaws on the inner surface of a pipe of magnetizable material comprising a magnetizing assembly having exciting magnets and movable longitudinally along the exterior of the pipe and a detecting assembly movable longitudinally along the interior of the pipe. The magnetizing and detecting assemblies are opposite and close to each other through the wall of the pipe and movable longitudinally of the pipe in a synchronized manner to ensure highly accurate flaw detection.
    Type: Grant
    Filed: December 13, 1978
    Date of Patent: March 24, 1981
    Assignee: Sumitomo Kinzoku Kogyo Kabushiki Kaisha
    Inventors: Yasuyuki Furukawa, Yoshihisa Fujii, Hitoshi Tanaka, Tetsuya Hirota
  • Patent number: 4217548
    Abstract: A detector for magnetically detecting flaws on the inner surface of a pipe of magnetizable material comprises a magnetizing assembly having exciting magnets and movable longitudinally along the interior of the pipe and a detecting assembly movable longitudinally along the exterior of the pipe. The magnetizing and detecting assemblies are opposite and close to each other through the wall of the pipe and movable longitudinally of the pipe in a synchronized manner to ensure highly accurate flaw detection.
    Type: Grant
    Filed: December 12, 1978
    Date of Patent: August 12, 1980
    Assignee: Sumitomo Kinzoku Kogyo Kabushiki Kaisha
    Inventors: Yasuyuki Furukawa, Yoshihisa Fujii, Hitoshi Tanaka, Tetsuya Hirota
  • Patent number: 4056412
    Abstract: This invention relates to a method wherein the setting angles of cooling water jetting orifices an outer quenching head and an inner quenching head are made 30.degree..+-.10.degree. in the pipe advancing direction with the pipe axis and the number of jetting orifices of the inner quenching head are greater for purposes of higher density for the front one-third of the length of the head and lower for purposes of lower density for the rear two-thirds of the length of the head.Further, the first contact point of inner quenching water within the inner surface of the pipe is so set as to be delayed by 20 to 150mm. from the first contact point of quenching water with the outer surface of the pipe, the outer quenching being carried out when the steel pipe heating temperature is above the A.sub.3 transformation point and the inner quenching is carried out when the temperature of the inner surface of the pipe is just below the A.sub.1 transformation point.
    Type: Grant
    Filed: September 12, 1975
    Date of Patent: November 1, 1977
    Assignee: Sumitomo Metal Industries Limited
    Inventors: Yoshihisa Fujii, Akio Fujiwara
  • Patent number: 3937448
    Abstract: This invention relates to an apparatus wherein the setting angles of cooling water jetting orifices and an outer quenching head and an inner quenching head are made 30.degree..+-.10.degree. in the pipe advancing direction with the pipe axis, and the number of jetting orifices of the inner quenching head are greater for purposes of higher density for the front 1/3 of the length of the head and lower for purposes of lower density for the rear 2/3 of the length of the head.Further, the first contact point of inner quenching water within the inner surface of the pipe is so set as to be delayed by 20 to 150mm. from the first contact point of quenching water with the outer surface of the pipe, the outer quenching being carried out when the steel pipe heating temperature is above the A.sub.3 transformation point and the inner quenching is carried out when the temperature of the inner surface of the pipe is just below the A.sub.1 transformation point.
    Type: Grant
    Filed: May 20, 1974
    Date of Patent: February 10, 1976
    Assignee: Sumitomo Metal Industries Limited
    Inventors: Yoshihisa Fujii, Akio Fujiwara