Patents by Inventor Yoshihisa Fujimoto

Yoshihisa Fujimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11327002
    Abstract: A size reduction in an optical system that detects a fluorescent photon is achieved. A photon detection operation of a photon detection unit (21) is controlled on the basis of timing of an irradiation operation of an excitation light source (50), and after excitation light emitted to a microfluidic channel (10) is switched off, a fluorescent photon generated by a target flowing in the microfluidic channel (10) is detected.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: May 10, 2022
    Assignees: SHARP KABUSHIKI KAISHA, THE UNIVERSITY OF TOKYO
    Inventors: Kunihiko Iizuka, Yoshihisa Fujimoto, Takeshi Mitsunaka, Teruo Fujii, Soo-Hyeon Kim
  • Patent number: 11325072
    Abstract: An object trapping device enables efficiently trapping a plurality of objects in a specific combination. Each of a first electrode pair (13), a second electrode pair (14), and a third electrode pair (15) in an electrode pair group (3) is applied with an individual AC voltage and traps an object by dielectrophoresis generated in accordance with the AC voltage that is applied.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: May 10, 2022
    Assignees: SHARP KABUSHIKI KAISHA, The University of Tokyo
    Inventors: Kunihiko Iizuka, Takeshi Mitsunaka, Yoshihisa Fujimoto, Teruo Fujii, Soo-Hyeon Kim
  • Patent number: 11268850
    Abstract: An analog front end that reads from a sensor an output signal which is either a current output signal (IOUT) or a charge output signal corrects characteristics of the sensor by adjusting a bias voltage (VBIASIN) of an output signal line from the sensor.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: March 8, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Yoshihisa Fujimoto
  • Patent number: 11067535
    Abstract: Provided are a fluorescent testing system, a dielectrophoresis device, and a molecular testing method that measure only fluorescence emitted from a test object without separating excitation light and the fluorescence by an optical filter and that are able to prevent reduction of an application range of a type of the fluorescence.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: July 20, 2021
    Assignees: SHARP KABUSHIKI KAISHA, The University of Tokyo
    Inventors: Kunihiko Iizuka, Yoshihisa Fujimoto, Takeshi Mitsunaka, Soo-Hyeon Kim, Teruo Fujii
  • Publication number: 20210101115
    Abstract: An object trapping device enables efficiently trapping a plurality of objects in a specific combination. Each of a first electrode pair (13), a second electrode pair (14), and a third electrode pair (15) in an electrode pair group (3) is applied with an individual AC voltage and traps an object by dielectrophoresis generated in accordance with the AC voltage that is applied.
    Type: Application
    Filed: March 23, 2018
    Publication date: April 8, 2021
    Applicants: SHARP KABUSHIKI KAISHA, The University of Tokyo
    Inventors: KUNIHIKO IIZUKA, TAKESHI MITSUNAKA, YOSHIHISA FUJIMOTO, TERUO FUJII, SOO-HYEON KIM
  • Patent number: 10895849
    Abstract: A time-to-digital conversion circuit includes; an oscillator circuit that outputs a plurality of phase signals different from each other, a counter that counts a number of edges of at least one phase signal among the plurality of phase signals and outputs a count signal, a phase sampling circuit that samples the value of each of the plurality of phase signals at a stop time point and outputs a stop phase signal, a start phase signal generating circuit that outputs a start phase signal, and an output circuit that, based on the count signal, the stop phase signal, and the start phase signal, generates an output signal, the output signal being a digital signal indicating a time period from a start time point to a stop time point.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: January 19, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Yoshihisa Fujimoto
  • Patent number: 10890528
    Abstract: Provided are a fluorescent testing system, a molecular testing method, and a fluorescent testing method that can avoid enlargement and complication. A fluorescent testing system (1) includes: an excitation light source (23) that radiates excitation light (L1) to protein to which a fluorescent probe is added; a silicon integrated circuit (10) including a photon detection unit (13) that detects light by a photodiode (12); a holding layer (30) including a microwell (31) that is provided above the photodiode (12) and holds the protein to which the fluorescent probe is added; and a control unit (24) that causes the excitation light source (23) to radiate the excitation light (L1) to the protein which. is held and to which the fluorescent probe is added and causes the photon detection unit (13), after extinguishment of the excitation light (L1), to detect fluorescence emitted from the protein to which the fluorescent probe is added.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: January 12, 2021
    Assignees: SHARP KABUSHIKI KAISHA, The University of Tokyo
    Inventors: Kunihiko Iizuka, Yoshihisa Fujimoto, Soo-Hyeon Kim, Teruo Fujii
  • Publication number: 20200363774
    Abstract: A time-to-digital conversion circuit includes; an oscillator circuit that outputs a plurality of phase signals different from each other, a counter that counts a number of edges of at least one phase signal among the plurality of phase signals and outputs a count signal, a phase sampling circuit that samples the value of each of the plurality of phase signals at a stop time point and outputs a stop phase signal, a start phase signal generating circuit that outputs a start phase signal, and an output circuit that, based on the count signal, the stop phase signal, and the start phase signal, generates an output signal, the output signal being a digital signal indicating a time period from a start time point to a stop time point.
    Type: Application
    Filed: May 11, 2020
    Publication date: November 19, 2020
    Inventor: YOSHIHISA FUJIMOTO
  • Patent number: 10788363
    Abstract: A SPAD control circuit for detecting a photon is provided. The SPAD control circuit includes a single photon avalanche diode (SPAD), a switch, a combinational circuit, and a sequential circuit. The SPAD has two terminals. The switch applies a voltage to one of the two terminals of the SPAD. The combinational circuit detects whether the SPAD is in an active state or a standby state. The sequential circuit includes a terminal that receives input of a pulse signal used to set the SPAD to the active state, a terminal that receives input of a reset-related signal, and an output terminal. The switch is controlled by an output signal output from the output terminal of the sequential circuit. An output signal of the combinational circuit is input to the terminal of the sequential circuit that receives input of the reset-related signal.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: September 29, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Yoshihisa Fujimoto
  • Patent number: 10725433
    Abstract: Time-to-digital conversion circuitry converts a time between a start time point and a stop time point, which are state-change time points of digital signals, into digital. The time-to-digital conversion circuitry comprises oscillation circuitry that outputs a plurality of phase signals having different phases, and outputs a digital value of the time based on the plurality of phase signals. The oscillation circuitry performs free-running oscillation and outputs the phase signals that do not synchronize with the start time point and the stop time point.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: July 28, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventor: Yoshihisa Fujimoto
  • Publication number: 20200174427
    Abstract: Time-to-digital conversion circuitry converts a time between a start time point and a stop time point, which are state-change time points of digital signals, into digital. The time-to-digital conversion circuitry comprises oscillation circuitry that outputs a plurality of phase signals having different phases, and outputs a digital value of the time based on the plurality of phase signals. The oscillation circuitry performs free-running oscillation and outputs the phase signals that do not synchronize with the start time point and the stop time point.
    Type: Application
    Filed: December 2, 2019
    Publication date: June 4, 2020
    Inventor: YOSHIHISA FUJIMOTO
  • Publication number: 20200158620
    Abstract: A size reduction in an optical system that detects a fluorescent photon is achieved. A photon detection operation of a photon detection unit (21) is controlled on the basis of timing of an irradiation operation of an excitation light source (50), and after excitation light emitted to a microfluidic channel (10) is switched off, a fluorescent photon generated by a target flowing in the microfluidic channel (10) is detected.
    Type: Application
    Filed: June 5, 2018
    Publication date: May 21, 2020
    Applicants: SHARP KABUSHIKI KAISHA, THE UNIVERSITY OF TOKYO, THE UNIVERSITY OF TOKYO
    Inventors: KUNIHIKO IIZUKA, YOSHIHISA FUJIMOTO, TAKESHI MITSUNAKA, TERUO FUJII, SOO-HYEON KIM
  • Publication number: 20200103275
    Abstract: [Object] An analog front end is realized which is capable of correcting a difference in characteristics between sensors without reduction of an operation speed. [Solution] An analog front end (400) that reads from a sensor (91) an output signal which is either a current output signal (IOUT) or a charge output signal corrects characteristics of the sensor by adjusting a bias voltage (VBIASIN) of an output signal line from the sensor.
    Type: Application
    Filed: September 25, 2019
    Publication date: April 2, 2020
    Inventor: Yoshihisa FUJIMOTO
  • Publication number: 20190285579
    Abstract: Provided are a fluorescent testing system, a dielectrophoresis device, and a molecular testing method that measure only fluorescence emitted from a test object without separating excitation light and the fluorescence by an optical filter and that are able to prevent reduction of an application range of a type of the fluorescence.
    Type: Application
    Filed: August 2, 2017
    Publication date: September 19, 2019
    Applicants: SHARP KABUSHIKI KAISHA, THE UNIVERSITY OF TOKYO
    Inventors: KUNIHIKO IIZUKA, YOSHIHISA FUJIMOTO, TAKESHI MITSUNAKA, SOO-HYEON KIM, TERUO FUJII
  • Publication number: 20190250102
    Abstract: Provided are a fluorescent testing system, a molecular testing method, and a fluorescent testing method that can avoid enlargement and complication. A fluorescent testing system (1) includes: an excitation light source (23) that radiates excitation light (L1) to protein to which a fluorescent probe is added; a silicon integrated circuit (10) including a photon detection unit (13) that detects light by a photodiode (12); a holding layer (30) including a microwell (31) that is provided above the photodiode (12) and holds the protein to which the fluorescent probe is added; and a control unit (24) that causes the excitation light source (23) to radiate the excitation light (L1) to the protein which. is held and to which the fluorescent probe is added and causes the photon detection unit (13), after extinguishment of the excitation light (L1), to detect fluorescence emitted from the protein to which the fluorescent probe is added.
    Type: Application
    Filed: July 20, 2017
    Publication date: August 15, 2019
    Inventors: KUNIHIKO IIZUKA, YOSHIHISA FUJIMOTO, SOO-HYEON KIM, TERUO FUJII
  • Publication number: 20190219443
    Abstract: A SPAD control circuit for detecting a photon is provided. The SPAD control circuit includes a single photon avalanche diode (SPAD), a switch, a combinational circuit, and a sequential circuit. The SPAD has two terminals. The switch applies a voltage to one of the two terminals of the SPAD. The combinational circuit detects whether the SPAD is in an active state or a standby state. The sequential circuit includes a terminal that receives input of a pulse signal used to set the SPAD to the active state, a terminal that receives input of a reset-related signal, and an output terminal. The switch is controlled by an output signal output from the output terminal of the sequential circuit. An output signal of the combinational circuit is input to the terminal of the sequential circuit that receives input of the reset-related signal.
    Type: Application
    Filed: January 16, 2019
    Publication date: July 18, 2019
    Inventor: YOSHIHISA FUJIMOTO
  • Patent number: 9213437
    Abstract: A touch panel controller (3) includes: a drive section (4); a differential amplifier (5); variable integral capacitors (Cint1, Cint2); and a capacitance control section (6) that controls the variable integral capacitors (Cint1, Cint2) so as to correct line dependency of capacitors (C31 to C34, C41 to S44).
    Type: Grant
    Filed: April 2, 2013
    Date of Patent: December 15, 2015
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yusuke Kanazawa, Yoshihisa Fujimoto
  • Publication number: 20150301682
    Abstract: A touch panel controller (3) includes: a drive section (4); a differential amplifier (5); variable integral capacitors (Cint1, Cint2); and a capacitance control section (6) that controls the variable integral capacitors (Cint1, Cint2) so as to correct line dependency of capacitors (C31 to C34, C41 to S44).
    Type: Application
    Filed: April 2, 2013
    Publication date: October 22, 2015
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yusuke Kanazawa, Yoshihisa Fujimoto
  • Patent number: 9145806
    Abstract: An exhaust treatment unit for a work vehicle includes a selective catalytic reduction apparatus, a connection pipe, an ejection apparatus attached to the connection pipe, a first pipe section that guides coolant to the ejection apparatus, a second pipe section that discharges coolant from the ejection apparatus, first and second retaining sections, and a coolant pump. The ejection apparatus ejects reducing agent into exhaust supplied to the selective catalytic reduction apparatus. The first and second retaining sections retain coolant and are connected to the first and second pipe sections above the ejection apparatus, respectively. The coolant pump is driven by an engine driving force and supplies the coolant to the ejection apparatus via the first pipe section. The first and second pipe sections extend upward from first and second connecting sections of the first and second pipe sections and the ejection apparatus toward the first and second retaining sections, respectively.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: September 29, 2015
    Assignee: KOMATSU LTD.
    Inventors: Hiroshi Nakagami, Taira Ozaki, Hironori Yamamitsu, Takashi Katou, Yoshihisa Fujimoto
  • Publication number: 20150078967
    Abstract: An exhaust treatment unit for a work vehicle includes a selective catalytic reduction apparatus, a connection pipe, an ejection apparatus attached to the connection pipe, a first pipe section that guides coolant to the ejection apparatus, a second pipe section that discharges coolant from the ejection apparatus, first and second retaining sections, and a coolant pump. The ejection apparatus ejects reducing agent into exhaust supplied to the selective catalytic reduction apparatus. The first and second retaining sections retain coolant and are connected to the first and second pipe sections above the ejection apparatus, respectively. The coolant pump is driven by an engine driving force and supplies the coolant to the ejection apparatus via the first pipe section. The first and second pipe sections extend upward from first and second connecting sections of the first and second pipe sections and the ejection apparatus toward the first and second retaining sections, respectively.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 19, 2015
    Inventors: Hiroshi Nakagami, Taira Ozaki, Hironori Yamamitsu, Takashi Katou, Yoshihisa Fujimoto