Abstract: A method of manufacturing a magnetoresistive effect element includes forming a first electrode above a substrate, forming a metal layer of a metal material above the first electrode, forming a first magnetic layer above the metal layer, forming a tunnel insulating film above the first magnetic layer, forming a second magnetic layer above the tunnel insulating film, forming a second electrode layer above the second magnetic layer, patterning the second electrode layer, patterning the second magnetic layer, the tunnel insulating film, the first magnetic layer and the metal layer, while depositing sputtered particles of the metal film on side walls of the second magnetic layer, the tunnel insulating film, the first magnetic layer and the metal layer to form a sidewall metal layer, and oxidizing the sidewall metal layer to form an insulative sidewall metal oxide layer.

Abstract: A method of manufacturing a magnetic tunneling junction device, includes: forming a magnetic pinned layer over a substrate; forming an insulating film over the magnetic pinned layer; forming a recess in the insulating film, the recess reaching a bottom of the insulating film; forming a tunneling insulating film over a bottom and side walls of the recess and over the insulating film; forming a magnetic free layer over the tunneling insulating film; forming an upper electrode conductive film on the magnetic free layer; and oxidizing a portion of the magnetic free layer along the side walls of the recess.

Abstract: A magnetic pinned layer is formed over a substrate. An insulating film is formed over the magnetic pinned layer. A recess is formed in and through the insulating film. A tunneling insulating film is formed over a bottom of the recess. A first magnetic free layer is formed over the bottom of the recess via the tunneling insulating film. A second magnetic free layer is formed over the insulating film and made of a same material as the first magnetic free layer. A non-magnetic film is formed on sidewalls of the recess, extending from the first magnetic free layer to the second magnetic free layer and made of oxide of the material of the first magnetic free layer. An upper electrode is disposed over the first magnetic free layer, non-magnetic film and second magnetic free layer, and electrically connected to the first magnetic free layer and second magnetic free layer.

Abstract: A method of manufacturing a magnetoresistive effect element includes forming a first electrode above a substrate, forming a metal layer of a metal material above the first electrode, forming a first magnetic layer above the metal layer, forming a tunnel insulating film above the first magnetic layer, forming a second magnetic layer above the tunnel insulating film, forming a second electrode layer above the second magnetic layer, patterning the second electrode layer, patterning the second magnetic layer, the tunnel insulating film, the first magnetic layer and the metal layer, while depositing sputtered particles of the metal film on side walls of the second magnetic layer, the tunnel insulating film, the first magnetic layer and the metal layer to form a sidewall metal layer, and oxidizing the sidewall metal layer to form an insulative sidewall metal oxide layer.

Abstract: A magnetic pinned layer is formed over a substrate. An insulating film is formed over the magnetic pinned layer. A recess is formed in and through the insulating film. A tunneling insulating film is formed over a bottom of the recess. A first magnetic free layer is formed over the bottom of the recess via the tunneling insulating film. A second magnetic free layer is formed over the insulating film and made of a same material as the first magnetic free layer. A non-magnetic film is formed on sidewalls of the recess, extending from the first magnetic free layer to the second magnetic free layer and made of oxide of the material of the first magnetic free layer. An upper electrode is disposed over the first magnetic free layer, non-magnetic film and second magnetic free layer, and electrically connected to the first magnetic free layer and second magnetic free layer.

Abstract: A method of manufacturing a semiconductor device includes: forming first conductive layer on semiconductor substrate; forming a magnetic film on the first conductive layer; forming second conductive layer on the magnetic film; forming a first mask layer on the second conductive layer; patterning the second conductive layer; patterning the magnetic film; forming a first insulating film on the first conductive layer to cover side surfaces of the patterned second conductive layer and the patterned magnetic film; forming a second mask layer on the first insulating film to cover the patterned second conductive layer, the patterned magnetic film, and the first insulating film; patterning the first insulating film; patterning the first conductive layer; forming a second insulating film on the semiconductor substrate to cover the patterned second conductive layer, the patterned magnetic film, and the patterned first conductive layer; and forming a third insulating film on the second insulating film.

Abstract: A method for manufacturing a semiconductor device includes forming in order a barrier film, an insulating film, a first mask, and a second mask having etching properties different from those of the first mask on a substrate, removing the insulating film, the first mask, and the second mask to form a via hole in the insulating film, removing the second mask in a wiring trench forming region including the via hole, and etching the first mask using the second mask as a mask to remove the first mask in the wiring trench forming region. Removing the first mask in the wiring trench forming region includes etching the first mask and etching the barrier film at the bottom of the via hole to partially remove the barrier film at the bottom of the via hole.

Abstract: A method of manufacturing a semiconductor device includes: forming first conductive layer on semiconductor substrate; forming a magnetic film on the first conductive layer; forming second conductive layer on the magnetic film; forming a first mask layer on the second conductive layer; patterning the second conductive layer; patterning the magnetic film; forming a first insulating film on the first conductive layer to cover side surfaces of the patterned second conductive layer and the patterned magnetic film; forming a second mask layer on the first insulating film to cover the patterned second conductive layer, the patterned magnetic film, and the first insulating film; patterning the first insulating film; patterning the first conductive layer; forming a second insulating film on the semiconductor substrate to cover the patterned second conductive layer, the patterned magnetic film, and the patterned first conductive layer; and forming a third insulating film on the second insulating film.

Abstract: A method of forming an insulating layer on an conductive layer; forming a first mask layer and a second mask layer on the insulating layer; forming a resist layer on the second mask layer; patterning the resist layer; patterning the second mask layer by using the resist layer as a mask; etching the first mask layer halfway through its thickness by using the resist layer and the second mask layer as a mask; removing the resist layer; etching a remaining portion of the first mask layer using the second mask layer as a mask; forming an interconnect groove by etching the insulating layer using the first mask layer as a mask; and forming an electrically conductive material into the interconnect groove, thereby forming an interconnect layer connected to the conductive layer.

Abstract: A method of forming an insulating layer on an conductive layer; forming a first mask layer and a second mask layer on the insulating layer; forming a resist layer on the second mask layer; patterning the resist layer; patterning the second mask layer by using the resist layer as a mask; etching the first mask layer halfway through its thickness by using the resist layer and the second mask layer as a mask; removing the resist layer; etching a remaining portion of the first mask layer using the second mask layer as a mask; forming an interconnect groove by etching the insulating layer using the first mask layer as a mask; and forming an electrically conductive material into the interconnect groove, thereby forming an interconnect layer connected to the conductive layer.

Abstract: A method for manufacturing a semiconductor device includes forming in order a barrier film, an insulating film, a first mask, and a second mask having etching properties different from those of the first mask on a substrate, removing the insulating film, the first mask, and the second mask to form a via hole in the insulating film, removing the second mask in a wiring trench forming region including the via hole, and etching the first mask using the second mask as a mask to remove the first mask in the wiring trench forming region. Removing the first mask in the wiring trench forming region includes etching the first mask and etching the barrier film at the bottom of the via hole to partially remove the barrier film at the bottom of the via hole.

Abstract: A four-layer structured hard mask composed of a SiC film, a first SiO2 film, a SiC film, and a second SiO2 film is formed on a porous silica film as an interlayer insulating film. Then, the second SiO2 film is etched with a resist mask. Subsequently, the SiC film is etched with the second SiO2 film. Thereafter, the first SiO2 film is etched with the SiC film. Subsequently, the SiC film is etched with the SiC film. Then, by etching the porous silica film with the SiC film, a wiring trench is formed. At this time, a selection ratio between the SiC film and the porous silica film is large, so that deformation of the SiC film rarely occurs, which prevents leakage caused by the deformation.

Abstract: A method of manufacturing a semiconductor device has forming an interlayer insulating film over a wiring layer, forming an opening in the interlayer insulating film, performing a first plasma treatment using a gas including hydrogen or ammonia, performing a second plasma treatment with a gas including fluorocarbon after the first plasma treatment.

Abstract: When a via-hole 26 and an interconnection trench 32 are formed in an interconnection films 16, 18 by using as a mask a hard mask 20 covering the region except via-hole forming region, and a hard mask 22 covering the region except an interconnection trench forming region, the hard mask 20 is isotropically etched to expose the upper surface of the inter-layer insulating film 18 at a periphery of the via-hole forming region and leave the hard mask 20 in the interconnection trench forming region except the periphery, and then the hard mask 20 and the insulating films 18, 16 are anisotropically etched, whereby the via-hole 26 having increased-width portion 34 at the upper part, and the interconnection trench 32 connected to the via-hole 26 at the increased-width portions 26 are formed.

Abstract: A four-layer structured hard mask composed of a SiC film, a first SiO2 film, a SiC film, and a second SiO2 film is formed on a porous silica film as an interlayer insulating film. Then, the second SiO2 film is etched with a resist mask. Subsequently, the SiC film is etched with the second SiO2 film. Thereafter, the first SiO2 film is etched with the SiC film. Subsequently, the SiC film is etched with the SiC film. Then, by etching the porous silica film with the SiC film, a wiring trench is formed. At this time, a selection ratio between the SiC film and the porous silica film is large, so that deformation of the SiC film rarely occurs, which prevents leakage caused by the deformation.

Abstract: After low dielectric constant films are formed on a wiring, hardmasks are formed on the low dielectric constant films. A resistmask is formed on the hardmasks. Via holes are formed in the low dielectric constant films using the resistmask. Ashing the resistmask is performed. During this process, a protection film is formed by sticking a sputtered material generated from the resistmask at least onto side surfaces of the via holes. Thereafter, the via holes are extended to the wiring, and a conductive material is buried into the via holes.

Abstract: After low dielectric constant films are formed on a wiring, hardmasks are formed on the low dielectric constant films. A resistmask is formed on the hardmasks. Via holes are formed in the low dielectric constant films using the resistmask. Ashing the resistmask is performed. During this process, a protection film is formed by sticking a sputtered material generated from the resistmask at least onto side surfaces of the via holes. Thereafter, the via holes are extended to the wiring, and a conductive material is buried into the via holes.

Abstract: A four-layer structured hard mask composed of a SiC film, a first SiO2 film, a SiC film, and a second SiO2 film is formed on a porous silica film as an interlayer insulating film. Then, the second SiO2 film is etched with a resist mask. Subsequently, the SiC film is etched with the second SiO2 film. Thereafter, the first SiO2 film is etched with the SiC film. Subsequently, the SiC film is etched with the SiC film. Then, by etching the porous silica film with the SiC film, a wiring trench is formed. At this time, a selection ratio between the SiC film and the porous silica film is large, so that deformation of the SiC film rarely occurs, which prevents leakage caused by the deformation.

Abstract: An SiC film, a porous silica film as an interlayer dielectric film, another SiC film, an SiO2 film, an SiN film, and an antireflection film are formed in this order on an interlayer dielectric film and Cu film. The antireflection film is coated with an organic photosensitive ArF resist, and the resist is exposed and developed to form a resist mask in which a wiring trench pattern is formed. A trench is then formed in the porous silica film, the latter SiC film, the SiO2 film, and the SiN film. Plasma processing using a hydrogen-containing gas is performed on the side surfaces of the porous silica film, thereby forming a modified layer. The exposed portion of the former SiC film is etched away to allow the trench to reach the Cu film.

Abstract: When a via-hole 26 and an interconnection trench 32 are formed in an interconnection films 16, 18 by using as a mask a hard mask 20 covering the region except via-hole forming region, and a hard mask 22 covering the region except an interconnection trench forming region, the hard mask 20 is isotropically etched to expose the upper surface of the inter-layer insulating film 18 at a periphery of the via-hole forming region and leave the hard mask 20 in the interconnection trench forming region except the periphery, and then the hard mask 20 and the insulating films 18, 16 are anisotropically etched, whereby the via-hole 26 having increased-width portion 34 at the upper part, and the interconnection trench 32 connected to the via-hole 26 at the increased-width portions 26 are formed.