Abstract: A MIM (metal-insulator-metal) capacitor is provided with a substrate; a first metal area; a second metal area formed between the substrate and the first metal area; and a first insulating layer formed between the first metal area and the second metal area; wherein a capacitance value is determined by opposing surface areas of the first metal area and the second metal area; and the MIM capacitor is further provided with: a third metal area formed between the second metal area and the substrate; and a second insulating layer formed between the third metal area and the second metal area; wherein the third metal area is connected to a ground potential.

Abstract: A variable capacitor includes an N+ layer including a variable capacitance region, a P+ layer epitaxially grown on the N+ layer and formed from a SiGe film and a Si film, and a P-type electrode. An NPN-HBT (Hetero-junction Bipolar Transistor) includes a collector diffusion layer formed simultaneously with the N+ layer of the variable capacitor, a collector layer, and a Si/SiGe layer epitaxially grown simultaneously with the P+ layer of the variable capacitor. Since a depletion layer formed in a PN junction of the variable capacitor can extend entirely across the N+ layer, reduction in variation range of the capacitance can be suppressed.

Abstract: A variable capacitor includes an N+ layer including a variable capacitance region, a P+ layer epitaxially grown on the N+ layer and formed from a SiGe film and a Si film, and a P-type electrode. An NPN-HBT (Hetero-junction Bipolar Transistor) includes a collector diffusion layer formed simultaneously with the N+ layer of the variable capacitor, a collector layer, and a Si/SiGe layer epitaxially grown simultaneously with the P+ layer of the variable capacitor. Since a depletion layer formed in a PN junction of the variable capacitor can extend entirely across the N+ layer, reduction in variation range of the capacitance can be suppressed.

Abstract: A variable capacitor includes an N+ layer including a variable capacitance region, a P+ layer epitaxially grown on the N+ layer and formed from a SiGe film and a Si film, and a P-type electrode. An NPN-HBT (Hetero-junction Bipolar Transistor) includes a collector diffusion layer formed simultaneously with the N+ layer of the variable capacitor, a collector layer, and a Si/SiGe layer epitaxially grown simultaneously with the P+ layer of the variable capacitor. Since a depletion layer formed in a PN junction of the variable capacitor can extend entirely across the N+ layer, reduction in variation range of the capacitance can be suppressed.

Abstract: A variable capacitor includes an N+ layer including a variable capacitance region, a P+ layer epitaxially grown on the N+ layer and formed from a SiGe film and a Si film, and a P-type electrode. An NPN-HBT (Hetero-junction Bipolar Transistor) includes a collector diffusion layer formed simultaneously with the N+ layer of the variable capacitor, a collector layer, and a Si/SiGe layer epitaxially grown simultaneously with the P+ layer of the variable capacitor. Since a depletion layer formed in a PN junction of the variable capacitor can extend entirely across the N+ layer, reduction in variation range of the capacitance can be suppressed.

Abstract: An active filter circuit (a band stop filter type or a band pass filter type) having high Q value and high efficiency and which is suitable for integration has an input signal vi inputted from the input terminal supplied to the non-inverting input terminal of the first differential amplifier. The output terminal of the first differential amplifier is connected to the non-inverting input terminal of the second differential amplifier, and the first capacitor 3 is connected between this connection line and the alternate current ground. An output of the second differential amplifier is connected to the non-inverting input terminal of the first differential amplifier via the second capacitor, the inverting input terminal of the first differential amplifier, the inverting input terminal of the second differential amplifier 4, the non-inverting input terminal of the third differential amplifier, the output terminal of the third differential amplifier and the output terminal of the active filter circuit.