Abstract: A temperature sensor for generating bit stream having duty ratio depending on temperature, includes: voltage generator to receive control bit and output first voltage having CTAT characteristic when the control bit is in first state and to output second voltage having PTAT characteristic when the control bit is in second state; integrating circuit to integrate value obtained by multiplying input voltage with a first coefficient in the first state and to integrate value obtained by multiplying the input voltage with second coefficient in the second state; quantizer to generate the bit stream by quantizing an output of the integrating circuit; pattern generator which is enabled in calibration mode and generates test signal having predetermined duty ratio; and subtraction circuit which is enabled in the calibration mode and subtracts reference voltage for calibration from an output voltage of the voltage generator in the first state.

Abstract: A control circuit of a digital control power circuit is provided. The control circuit includes a feedback controller configured to generate a digital duty command value such that a digital feedback value corresponding to an output voltage of the digital control power circuit is close to a target value thereof, a pulse generator configured to generate a pulse signal having a duty ratio corresponding to the digital duty command value, a non-linear controller configured to correct a pulse width of the pulse signal when a variation in the output voltage is detected, and a driver configured to drive a switching device of the digital control power circuit depending on the pulse signal.

Abstract: A temperature sensor for generating bit stream having duty ratio depending on temperature, includes: voltage generator to receive control bit and output first voltage having CTAT characteristic when the control bit is in first state and to output second voltage having PTAT characteristic when the control bit is in second state; integrating circuit to integrate value obtained by multiplying input voltage with a first coefficient in the first state and to integrate value obtained by multiplying the input voltage with second coefficient in the second state; quantizer to generate the bit stream by quantizing an output of the integrating circuit; pattern generator which is enabled in calibration mode and generates test signal having predetermined duty ratio; and subtraction circuit which is enabled in the calibration mode and subtracts reference voltage for calibration from an output voltage of the voltage generator in the first state.

Abstract: A control circuit of a digital control power circuit is provided. The control circuit includes a feedback controller configured to generate a digital duty command value such that a digital feedback value corresponding to an output voltage of the digital control power circuit is close to a target value thereof, a pulse generator configured to generate a pulse signal having a duty ratio corresponding to the digital duty command value, a non-linear controller configured to correct a pulse width of the pulse signal when a variation in the output voltage is detected, and a driver configured to drive a switching device of the digital control power circuit depending on the pulse signal.

Abstract: An equalizer amplifies a predetermined bandwidth of an input signal with an adjustable gain. A driver amplifies an output signal S1 of the equalizer, and outputs the signal thus amplified. An amplifiers amplifies the output signal S1 of the equalizer. A first high-pass filter allows a predetermined bandwidth of the output signal of the equalizer to pass. A second high-pass filter allows a predetermined bandwidth of the output signal of the amplifier to pass. A first error amplifier amplifies the difference between the output signals of the first high-pass filter and the second high-pass filter so as to generate an error signal, and controls the gain of the equalizer according to the error signal thus generated. The amplifier has a configuration in which a single-stage differential amplifier employing MOSFETs is arranged. An adjustment resistor is provided between the drains of the differential transistor pair in order to increase the bandwidth.

Abstract: A TMDS driver outputs differential signals via a pair of differential signal lines. The input differential pair includes a first transistor and a second transistor with one terminals thereof connected to each other so as to form a common terminal, and operates with termination resistors, which are arranged on the side of a differential receiver connected via the differential signal lines, as a part of the load. A tail current source supplies constant current to the input differential pair. An impedance adjusting unit is provided between the input differential pair and the differential signal lines, and adjusts the load impedance of the first transistor and the second transistor.