Patents by Inventor Yoshihisa Takase

Yoshihisa Takase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7212094
    Abstract: An inductive component in which a large enough inductance is obtainable even when the size is made smaller and the profile is made lower and electronic devices using the inductive component are provided. The inductive component includes a coil, a through hole inside the coil, and a multilayer magnetic layer, and the multilayer magnetic layer is disposed on the top and the bottom surfaces of the coil and the inner wall of the through hole.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: May 1, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Nobuya Matsutani, Akihiko Ibata, Yoshihisa Takase, Takeshi Takahashi
  • Patent number: 7197820
    Abstract: A circuit board is provided in which peeling strength is prevented from decreasing and a connection resistance to a conductive material is prevented from increasing, though the contact area decreases when the circuit board has a copper foil. This circuit board has a metal film for covering a through hole on at least one surface of an insulating substrate having the through hole filled with the conductive material. An uneven layer with a thickness of 5 ?m or more is formed on a surface of the metal film, and a metal layer is formed on the opposite surface to the uneven layer.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: April 3, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshio Sugawa, Yoshihisa Takase
  • Patent number: 7151228
    Abstract: The present invention comprises a plurality of laminating double-side circuit boards and a plurality sheets of prepreg for interlayer connection that are placed one on another. Via holes extend from the circuit on one side of each laminating double-side circuit board to the circuit on the other side thereof. Each via hole is filled with electro-conductive material to connect the circuits on both sides of the laminating double-side circuit board. The pad on a laminating double-side circuit board and the pad on another laminating double-side circuit board are laminated via a sheet of prepreg for interlayer connection so that the respective pads are opposed to each other via the through hole filled with electro-conductive material formed through the sheet of prepreg for interlayer connection. Thereby, the respective pads on the laminating double-side wiring circuit boards are electrically connected with one another.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: December 19, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Takase, Tsuneshi Nakamura
  • Publication number: 20050068150
    Abstract: An inductive component in which a large enough inductance is obtainable even when the size is made smaller and the profile is made lower and electronic devices using the inductive component are provided. The inductive component includes a coil, a through hole inside the coil, and a multilayer magnetic layer, and the multilayer magnetic layer is disposed on the top and the bottom surfaces of the coil and the inner wall of the through hole.
    Type: Application
    Filed: October 30, 2003
    Publication date: March 31, 2005
    Inventors: Nobuya Matsutani, Akihiko Ibata, Yoshihisa Takase, Takeshi Takahashi
  • Patent number: 6791818
    Abstract: An electrode of an electronic device includes plural nickel layers adjacent to each other, and an outer nickel layer contains less phosphorus than an inner nickel layer. The electrode has an increased solder joining strength without having a flexural strength decreased.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: September 14, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Koji Shimoyama, Yoshihisa Takase
  • Patent number: 6753033
    Abstract: A method of printing high-quality high-density circuit pattern in a production of a ceramic thick-film printed circuit board. The method comprises forming a resin layer for prevention of sagging on a substrate before printing the circuit pattern. The present invention provides conditions optimizing materials, thickness, surface roughness, printing conditions and firing conditions of the resin layer. According to the manufacturing method of the present invention, a ceramic thick-film printed circuit board densely printed with a satisfactory printed pattern and free of problems such as film exfoliation, deformation of the pattern, pinholes and the like can readily be obtained.
    Type: Grant
    Filed: March 14, 2001
    Date of Patent: June 22, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Akira Hashimoto, Yoshihisa Takase
  • Publication number: 20040104042
    Abstract: The present invention comprises a plurality of laminating double-side circuit boards and a plurality sheets of prepreg for interlayer connection that are placed one on another. Via holes extend from the circuit on one side of each laminating double-side circuit board to the circuit on the other side thereof. Each via hole is filled with electro-conductive material to connect the circuits on both sides of the laminating double-side circuit board. The pad on a laminating double-side circuit board and the pad on another laminating double-side circuit board are laminated via a sheet of prepreg for interlayer connection so that the respective pads are opposed to each other via the through hole filled with electro-conductive material formed through the sheet of prepreg for interlayer connection. Thereby, the respective pads on the laminating double-side wiring circuit boards are electrically connected with one another.
    Type: Application
    Filed: October 1, 2002
    Publication date: June 3, 2004
    Inventors: Yoshihisa Takase, Tsuneshi Nakamura
  • Publication number: 20040045738
    Abstract: The present invention provides a circuit board in which peeling strength is prevented from decreasing and connection resistance to conductive material is prevented from increasing, though the contact area decreases when the circuit board has a copper foil. This circuit board has metal film (105) for covering a through hole on at least one surface of insulating substrate (101) having the through hole filled with conductive material (104). Uneven layer (1069 with a thickness of 5 &mgr;m or more is formed on a surface of metal film (105), and a metal layer is formed on the opposite surface to uneven layer (106).
    Type: Application
    Filed: July 9, 2003
    Publication date: March 11, 2004
    Inventors: Toshio Sugawa, Yoshihisa Takase
  • Patent number: 6514364
    Abstract: The conductive particles can be sintered without being influenced by softening and removing of the adhesive layer. As a result, a wiring pattern of high precision can be formed without causing deformation of conductive pattern.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: February 4, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuhiro Miura, Yoshihisa Takase, Masaaki Hayama, Eiji Kawamoto, Yuji Yagi
  • Publication number: 20020056509
    Abstract: The conductive particles can be sintered without being influenced by softening and removing of the adhesive layer. As a result, a wiring pattern of high precision can be formed without causing deformation of conductive pattern.
    Type: Application
    Filed: December 13, 1999
    Publication date: May 16, 2002
    Inventors: KAZUHIRO MIURA, YOSHIHISA TAKASE, MASAAKI HAYAMA, EIJI KAWAMOTO, YUJI YAGI
  • Patent number: 6347584
    Abstract: A method of manufacturing electronic components using intaglio transfer printing for improving printing yield. Intaglio 1 having a dual releasing layer structure is used. In this structure, first releasing layer 2 is formed on the surface of intaglio 1 by chemical absorption, and second releasing layer 3 is formed on the first releasing layer by physical adsorption. This structure allows intaglio 1 to have stable releasing ability, thereby improving the printing yield. In addition, because second releasing layer 3 can be added as required, the printing yield is not decreased even when the intaglio is repeatedly used for printing. Furthermore, the dual releasing layer structure can improve durability of the releasing ability of intaglio 1. As a result, patterns for electronic components can be formed on substrates at an excellent yield.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: February 19, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Eiji Kawamoto, Kazuhiro Miura, Masaaki Hayama, Yoshihisa Takase
  • Publication number: 20010029665
    Abstract: A method of printing high-quality high-density circuit pattern in a production of a ceramic thick-film printed circuit board. The method comprises forming a resin layer for prevention of sagging on a substrate before printing the circuit pattern. The present invention provides conditions optimizing materials, thickness, surface roughness, printing conditions and firing conditions of the resin layer. According to the manufacturing method of the present invention, a ceramic thick-film printed circuit board densely printed with a satisfactory printed pattern and free of problems such as film exfoliation, deformation of the pattern, pinholes and the like can readily be obtained.
    Type: Application
    Filed: March 14, 2001
    Publication date: October 18, 2001
    Inventors: Akira Hashimoto, Yoshihisa Takase
  • Patent number: 6028011
    Abstract: Electroless nickel plating and gold plating is performed on an aluminum electrode in order to construct a highly reliable electrode. The steps are: depositing zinc on the aluminum electrode with zincate treatment liquid containing sodium hydroxide and zinc oxide; immersing it in solution which is prepared by dissolving sodium hypophosphite as a reducing agent into de-ionized water, followed by addition of de-ionized water while adjusting for the pH of 9.0 to 12.0 with sodium hydroxide solution, so as to make a total volume of 1000 ml; nickel-plating the aluminum electrode of the semiconductor device by using electroless nickel plating solution of oxidation-reduction reacting type containing sulfur compound as a reaction promoter, under a condition of the pH at 4.0 to 6.8 and a temperature of 80 to 90.degree. C.
    Type: Grant
    Filed: October 13, 1998
    Date of Patent: February 22, 2000
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshihisa Takase, Naoki Okazaki
  • Patent number: 5208450
    Abstract: In an IC card of the invention, an IC module (3) is adhered to a first concave (9) of a card base (1) by means of an adhesive (7) and a gap (8) is formed between the outside surface of the IC module (3) and the inside surface of the first concave (9), the gap being wider in the inside upper part and narrower in the inside lower part of the first concave (9), so that the IC chip in the IC module (3) and the card base (1) can be protected from damages caused by bending of the the card base (1).
    Type: Grant
    Filed: October 16, 1991
    Date of Patent: May 4, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuaki Uenishi, Yoshihisa Takase, Takashi Fujii