Patents by Inventor Yoshihito Konta

Yoshihito Konta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10990535
    Abstract: A storage control apparatus includes a memory to store meta-information associating a position of a logical area with a position of a physical area, and a processor to, when a first data block including data, a check code corresponding to the data, and first information related to a position within the logical area is stored in the physical area, and a second data block including the data, the check code, and second information related to a position within the logical area is written in the logical area, obtain a first position at which the first data block is present in the physical area, based on meta-information of the first data block in the meta-information, associate the first position as a position of the physical area in meta-information of the second data block in the meta-information with the position to which the second data block is written in the logical area.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: April 27, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Naohiro Takeda, Norihide Kubota, Yoshihito Konta, Toshio Kikuchi, Yusuke Kurasawa, Yuji Tanaka, Marino Kajiyama, Yusuke Suzuki, Yoshinari Shinozaki, Takeshi Watanabe
  • Patent number: 10866743
    Abstract: A storage control device, includes: a memory configured to store meta information and map information, the meta information associates a logical address to identify data from an information processing device which uses a storage with a data block identifier to identify a data block used for an arrangement of the data on the storage and including a header area and a payload area and an index indicating an order of additional writing of the data, the map information associates the data block identifier with a physical identifier indicating a physical position on the storage; and a processor specifies the data block and a write position in a payload area based on the physical identifier and the index, writes the data in the specified data block and performs a write control to write a data unit header including an offset and a data length at a position designated by the index.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: December 15, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Yusuke Suzuki, Yusuke Kurasawa, Norihide Kubota, Yoshihito Konta, Marino Kajiyama, Yuji Tanaka, Toshio Iga, Kazuya Takeda, Takeshi Watanabe
  • Patent number: 10691550
    Abstract: A storage control apparatus includes a memory configured to store meta-information for associating addresses of a logical area and a physical area with each other, and a processor coupled to the memory and configured to read out first meta-information corresponding to a first logical area from the memory, specify a first address of the physical area corresponding to a copy source address of the data based on the first meta-information, read out second meta-information corresponding to a second logical area that is set as a copy destination of the data in the logical area from the memory, specify a second address of the physical area corresponding to a copy destination address of the data based on the second meta-information, and execute copy of the data by associating the first address and the second address with each other as storage areas of the data.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: June 23, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Yoshinari Shinozaki, Takeshi Watanabe, Norihide Kubota, Yoshihito Konta, Toshio Kikuchi, Naohiro Takeda, Yusuke Kurasawa, Yuji Tanaka, Marino Kajiyama, Yusuke Suzuki
  • Patent number: 10380044
    Abstract: A control apparatus served as a first control apparatus includes a first information storage unit configured to store therein coupling information relating to a coupling relationship between a plurality of control apparatus and a plurality of devices, the plurality of control apparatus including the first control apparatus and controlling access to the plurality of devices, and a processor. The processor specifies, in response to a first access request to a first device from among the plurality of devices, a second control apparatus responsible for the first device based on the coupling information stored in the first information storage unit, and issues an instruction to access to the first device based on the first access request received by the first control apparatus to the specified second control apparatus through a relay apparatus that relays information to be transferred between the plurality of control apparatus.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: August 13, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Kenji Kobayashi, Koutarou Nimura, Yoshihito Konta, Marie Abe, Masatoshi Nakamura, Tomo Fukui
  • Publication number: 20190243563
    Abstract: A storage control device, includes: a memory configured to store meta information and map information, the meta information associates a logical address to identify data from an information processing device which uses a storage with a data block identifier to identify a data block used for an arrangement of the data on the storage and including a header area and a payload area and an index indicating an order of additional writing of the data, the map information associates the data block identifier with a physical identifier indicating a physical position on the storage; and a processor specifies the data block and a write position in a payload area based on the physical identifier and the index, writes the data in the specified data block and performs a write control to write a data unit header including an offset and a data length at a position designated by the index.
    Type: Application
    Filed: January 29, 2019
    Publication date: August 8, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yusuke Suzuki, Yusuke Kurasawa, Norihide KUBOTA, YOSHIHITO KONTA, Marino Kajiyama, Yuji TANAKA, Toshio IGA, Kazuya Takeda, Takeshi WATANABE
  • Publication number: 20190243758
    Abstract: A storage control device includes a processor that reads out a group write area, in which data blocks are arranged, from a storage medium and store the group write area in a buffer area. The processor releases a part of the payload area for each data block arranged in the first group write area stored in the first buffer area. The part stores invalid data. The processor performs the garbage collection by performing data refilling. The data refilling is performed by moving valid data stored in the payload to fill up a front by using the released part, and updating an offset included in a header stored in a header area at a position indicated by index information corresponding to the moved valid data without changing the position indicated by the index information corresponding to the moved valid data. The header area is included in the data block.
    Type: Application
    Filed: January 9, 2019
    Publication date: August 8, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Kazuya Takeda, Yusuke Kurasawa, Yusuke Suzuki, Norihide KUBOTA, Yuji TANAKA, Toshio IGA, YOSHIHITO KONTA, Marino Kajiyama, Takeshi WATANABE
  • Publication number: 20190056878
    Abstract: A storage control apparatus is provided, which includes a memory and a control unit. The memory stores information about reference counts each indicating the number of logical addresses that reference a data block and information indicating an update status of each reference count. When a reference count is changed, the control unit updates the information about the reference count in the memory, sets the update status such as to indicate that the reference count has been updated, and at prescribed timing, stores the information about the reference count that has been updated in a storage device and sets the update status such as to indicate that the reference count has not been updated. When performing a process based on the reference counts, the control unit excludes data blocks corresponding to the reference counts that have been updated, from the process.
    Type: Application
    Filed: July 24, 2018
    Publication date: February 21, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Shinichi NISHIZONO, Yoshihito Konta
  • Publication number: 20180307565
    Abstract: A storage control apparatus includes a memory configured to store meta-information for associating addresses of a logical area and a physical area with each other, and a processor coupled to the memory and configured to read out first meta-information corresponding to a first logical area from the memory, specify a first address of the physical area corresponding to a copy source address of the data based on the first meta-information, read out second meta-information corresponding to a second logical area that is set as a copy destination of the data in the logical area from the memory, specify a second address of the physical area corresponding to a copy destination address of the data based on the second meta-information, and execute copy of the data by associating the first address and the second address with each other as storage areas of the data.
    Type: Application
    Filed: April 18, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Yoshinari Shinozaki, Takeshi Watanabe, Norihide Kubota, Yoshihito Konta, Toshio Kikuchi, Naohiro Takeda, Yusuke Kurasawa, Yuji Tanaka, Marino Kajiyama, Yusuke Suzuki
  • Publication number: 20180307615
    Abstract: A storage control apparatus configured to control a storage device including a storage medium having a limited number of writes, includes a memory, and a processor coupled to the memory and configured to store, in the memory, address conversion information associating logical addresses used for data identification by an information processing apparatus accessing to the storage device, and physical addresses indicating positions where the data is stored on the storage medium, write the data additionally and collectively to the storage medium, and when the data is updated, maintain storing a reference logical address associated with the data before updated and the data before updated on the storage medium.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Naohiro Takeda, Norihide KUBOTA, YOSHIHITO KONTA, Yusuke Kurasawa, Toshio Kikuchi, Yuji TANAKA, Marino Kajiyama, Yusuke Suzuki, YOSHINARI SHINOZAKI, Takeshi WATANABE, Noriyuki Yasu
  • Publication number: 20180307616
    Abstract: A storage control apparatus includes a memory to store meta-information associating a position of a logical area with a position of a physical area, and a processor to, when a first data block including data, a check code corresponding to the data, and first information related to a position within the logical area is stored in the physical area, and a second data block including the data, the check code, and second information related to a position within the logical area is written in the logical area, obtain a first position at which the first data block is present in the physical area, based on meta-information of the first data block in the meta-information, associate the first position as a position of the physical area in meta-information of the second data block in the meta-information with the position to which the second data block is written in the logical area.
    Type: Application
    Filed: April 17, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Naohiro Takeda, Norihide KUBOTA, YOSHIHITO KONTA, Toshio Kikuchi, Yusuke Kurasawa, Yuji TANAKA, Marino Kajiyama, Yusuke Suzuki, YOSHINARI SHINOZAKI, Takeshi WATANABE
  • Publication number: 20180307440
    Abstract: A storage control apparatus configured to control a storage device including a storage medium having a limit of a number of writes, includes a memory, and a processor coupled to the memory and configured to store, in the memory, address conversion information in which a logical address used to identify data by an information processing device using the storage device and a physical address indicating a memory location of the data in the storage medium are associated with each other, and execute a bulk writing of a piece of the address conversion information into the storage medium sequentially.
    Type: Application
    Filed: April 10, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Naohiro Takeda, Norihide KUBOTA, YOSHIHITO KONTA, Yusuke Kurasawa, Toshio Kikuchi, Yuji TANAKA, Marino Kajiyama, Yusuke Suzuki, YOSHINARI SHINOZAKI, Takeshi WATANABE
  • Publication number: 20180307427
    Abstract: A storage control apparatus includes a memory, and a processor coupled to the memory and configured to execute a capacity expansion on a storage group including a plurality of storage devices, generate a plurality of first data storage regions in accordance with the number of storage devices within the storage group after the capacity expansion, and execute data rearrangement within the storage group after the capacity expansion for each of the plurality of first data storage regions.
    Type: Application
    Filed: April 18, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Takeshi WATANABE, YOSHINARI SHINOZAKI, Marino Kajiyama, Toshio Kikuchi, YOSHIHITO KONTA, Norihide KUBOTA, Yusuke Kurasawa, Yusuke Suzuki, Yuji TANAKA, Naohiro Takeda
  • Publication number: 20180307419
    Abstract: A storage control apparatus configured to control a storage device including a storage medium with a limited number of writes, includes a memory, and a processor coupled to the memory and configured to record, to the storage medium, address conversion information associating logical addresses by which an information processing apparatus that uses the storage device identifies data with physical addresses indicating positions where the data is stored on the storage medium, and execute garbage collection of the storage medium based on the recorded address conversion information.
    Type: Application
    Filed: April 10, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Naohiro Takeda, Yusuke Kurasawa, Norihide KUBOTA, YOSHIHITO KONTA, Toshio Kikuchi, Yuji TANAKA, Marino Kajiyama, Yusuke Suzuki, Takeshi WATANABE, YOSHINARI SHINOZAKI
  • Patent number: 9703695
    Abstract: A control device including a processor. The processor configured to allocate a data area of a memory device to a plurality of memory areas of data blocks of a first size; allocate identical data blocks of the first size to a plurality of the data areas of the memory device; manage management information indicating a data storing state of the plurality of memory areas of data blocks of the first size in each data area; determine, based on the management information regarding a plurality of data areas allocated with respect to a data block to be written, one data area from the plurality of data areas; and generate write data of a second size, which is different from the first size, including data of the data block to be written and write the write data in the one data area.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: July 11, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Hidefumi Kobayashi, Yoshihito Konta, Atsushi Igashira, Koutarou Nimura, Marie Abe, Mihoko Tojo, Masatoshi Nakamura
  • Patent number: 9535791
    Abstract: There is provided a storage control device that is communicably connected to a plurality of storage devices and a plurality of spare storage devices through a plurality of paths. The storage control device includes: a memory configured to store path information associating the plurality of spare storage devices and the plurality of paths with each other; and a selection unit configured to select a spare storage device that is a replacing apparatus from among the plurality of spare storage devices based on a path connection condition determined in accordance with a path in which the storage device that is a replacement target among the plurality of storage devices is connected and the path information.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: January 3, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Yoshihito Konta, Norihide Kubota, Kenji Kobayashi
  • Patent number: 9529707
    Abstract: Write commands for a storage device specify write data with either a first data step size or a second data step size. In the former case, the storage device performs a read-modify-write (RMW) cycle which includes reading data with the second data step size. In the latter case, the storage device executes the command in a single write cycle. A command sorting unit sorts received commands into two groups, first commands and second commands, when storing them in a memory. First commands are write commands whose data boundaries do not match with the second data step size. Second commands include write commands whose data boundaries match with the second data step size. A command issuing unit converts first commands into a second command upon predetermined conditions. The command issuing unit issues the second commands to the storage device, in preference to the first commands.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: December 27, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Masatoshi Nakamura, Koutarou Nimura, Marie Abe, Yoshihito Konta, Hidefumi Kobayashi, Mihoko Tojo, Yasuhiro Ogasawara, Shigeru Akiyama
  • Publication number: 20160321198
    Abstract: A control apparatus served as a first control apparatus includes a first information storage unit configured to store therein coupling information relating to a coupling relationship between a plurality of control apparatus and a plurality of devices, the plurality of control apparatus including the first control apparatus and controlling access to the plurality of devices, and a processor. The processor specifies, in response to a first access request to a first device from among the plurality of devices, a second control apparatus responsible for the first device based on the coupling information stored in the first information storage unit, and issues an instruction to access to the first device based on the first access request received by the first control apparatus to the specified second control apparatus through a relay apparatus that relays information to be transferred between the plurality of control apparatus.
    Type: Application
    Filed: March 14, 2016
    Publication date: November 3, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Kenji KOBAYASHI, Koutarou Nimura, YOSHIHITO KONTA, Marie Abe, Masatoshi Nakamura, Tomo FUKUI
  • Publication number: 20150347224
    Abstract: In response to a write request for write data, a write control unit writes the write data to a first memory device with the addition of an additional data piece to be updated with each write to the same storage area while writing the additional data piece, within a second memory device, to a storage area corresponding to the write data. In response to a read request for read request, a read control unit reads the read data and an additional data piece added to the read data from the first memory device while reading an additional data piece, within the second memory device, from a storage area corresponding to the read data, and determines validity of the read data based on a checked result obtained by checking the additional data pieces individually read from the first and the second memory devices.
    Type: Application
    Filed: April 29, 2015
    Publication date: December 3, 2015
    Inventors: Marie Abe, Koutarou Nimura, Yoshihito Konta, Masatoshi Nakamura
  • Publication number: 20150242131
    Abstract: An HDD driving unit 20 that queues a command for each zone that is acquired by dividing a storage region, and that issues commands from a queue of each zone in a consecutive manner includes a mode switching unit 29 that updates a threshold value of consecutive issuance of commands to a single zone based on an access condition to an HDD 9 and a command issuing unit 27 that controls issuance of a command to each zone based on the threshold value updated by the mode switching unit 29.
    Type: Application
    Filed: January 28, 2015
    Publication date: August 27, 2015
    Inventors: Masatoshi NAKAMURA, Koutarou Nimura, Marie Abe, Yoshihito Konta, Hideo Takahashi
  • Patent number: 9069721
    Abstract: A storage control device obtains an access request having a random characteristic or an access request having a sequential characteristic, compares a threshold with a ratio of the number of commands corresponding to the access request having the random characteristic to the number of commands corresponding to the access request having the sequential characteristic, generates and issues a command to which first identification information for instructing a storage to determine an execution order of commands issued to the storage has been assigned or a command to which second identification information for instructing the storage to execute commands in an order in which the storage received the commands has been assigned, in accordance with a result of the comparison, measures a time from issuance of the command to a response from the storage when the obtained access request has a random characteristic, and adjusts the threshold.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: June 30, 2015
    Assignee: FUJITSU LIMITED
    Inventors: Yoshihito Konta, Koutarou Nimura, Marie Abe