Patents by Inventor Yoshiho Maeda

Yoshiho Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240118167
    Abstract: An optical characteristic inspection circuit includes, in order, an optical input element, an optical splitter circuit including a resistor, a first optical circuit to be inspected connected to one output of the optical splitter circuit, a second optical circuit to be inspected connected to another output of the optical splitter circuit, and a photodetector that detects an intensity of light transmitted through the first optical circuit to be inspected and an intensity of light transmitted through the second optical circuit to be inspected. Therefore, the present invention can provide an optical characteristic inspection circuit capable of reducing man-hours required for optical characteristic inspection.
    Type: Application
    Filed: March 25, 2021
    Publication date: April 11, 2024
    Inventors: Yoshiho Maeda, Toru Miura, Hiroshi Fukuda
  • Publication number: 20240027681
    Abstract: A photoelectric conversion device includes a plurality of optical waveguides that are formed on a substrate and have the same waveguide direction, and a plurality of waveguide-type photoelectric conversion elements that are connected to the respective optical waveguides. The plurality of photoelectric conversion elements is arranged in the waveguide direction of the plurality of optical waveguides. In a planar view, the line segment connecting the photoelectric conversion elements adjacent to one another in the waveguide direction of the plurality of photoelectric conversion elements is inclined with respect to the waveguide direction.
    Type: Application
    Filed: September 15, 2020
    Publication date: January 25, 2024
    Inventors: Koji Takeda, Takuro Fujii, Tomonari Sato, Toshiki Kishi, Yoshiho Maeda, Toru Segawa, Shinji Matsuo
  • Patent number: 11880070
    Abstract: Plural grating couplers having grating conditions different from each other and plural optical waveguides respectively connected with the plural grating couplers are included. The plural grating couplers have the same arraying directions of gratings. Further, each of the plural grating couplers has a different grating interval as a grating condition. Further, plural reflection units respectively provided to the plural optical waveguides are included.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: January 23, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Toru Miura, Yoshiho Maeda, Hiroshi Fukuda
  • Patent number: 11815422
    Abstract: An embodiment optical test circuit includes a first optical circuit and a second optical circuit formed on a substrate, an input optical waveguide optically connected to the first optical circuit and the second optical circuit, and an output optical waveguide optically connected to the first optical circuit and the second optical circuit. The optical test circuit also includes a light emitting diode optically connected to the input optical waveguide, and a photodiode optically connected to the output optical waveguide.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: November 14, 2023
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroshi Fukuda, Toru Miura, Yoshiho Maeda
  • Patent number: 11557685
    Abstract: The misalignment between light reception lenses and light reception elements in a lens integrated light reception element for converting a plurality of optical signals with different wavelengths into electric signals is easily inspected. The lens integrated light reception element includes one or more light reception lenses that receive the optical signals, one or more light reception elements each disposed on a main axis of the light reception lens and converting the optical signal into the electric signal, one or more inspection pinholes through which illumination light passes, and one or more inspection lenses each including a main axis parallel to the main axis of the light reception lens and converging the illumination light having passed through the inspection pinhole.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: January 17, 2023
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Toshihide Yoshimatsu, Yoshiho Maeda, Fumito Nakajima
  • Publication number: 20230011341
    Abstract: A light receiving device includes, on a substrate, a Si waveguide core provided in a dielectric layer, a first i-type waveguide clad, an i-type core layer, a second i-type waveguide clad, p-type layers disposed on one side of a side surface of a layered structure in a light waveguide direction, the layered structure including the first i-type waveguide clad, the i-type core layer, and the second i-type waveguide clad, n-type layers disposed on the other side, and an electrode on a surface of each of the n-type layers. A width of the Si waveguide core is set to be able to suppress absorption of light in a vicinity of an input edge of the i-type core layer.
    Type: Application
    Filed: December 17, 2019
    Publication date: January 12, 2023
    Inventors: Yoshiho Maeda, Tatsuro Hiraki, Takuma Aihara
  • Publication number: 20220416108
    Abstract: A light reception device of the present invention includes a first i-type cladding region, an n-type waveguide core having a predetermined width, and a second i-type cladding region in contact with a side surface of the n-type waveguide core on a substrate, includes a p-type absorption layer, a p-type diffusion barrier layer, a p-type contact layer, and a p-type electrode formed in an upper part above a region including a part of the n-type waveguide core, with an i-type insertion layer interposed between the upper part and the region, and includes an n-type electrode on an upper surface of another part of the n-type waveguide core.
    Type: Application
    Filed: November 20, 2019
    Publication date: December 29, 2022
    Inventors: Yoshiho Maeda, Tatsuro Hiraki, Hiroshi Fukuda
  • Publication number: 20220357532
    Abstract: An embodiment optical circuit wafer includes a plurality of unit sections formed on a wafer. The plurality of unit sections are formed in each of first dies, second dies, and third dies. Further, each of the plurality of unit sections includes electrical pads formed in a common layout. Further, each of the plurality of unit sections includes optical input/output ports formed in a common layout. The input/output ports are, for example, grating couplers. Further, each of the plurality of unit sections includes optical circuits. The optical circuits have different circuit structures from one another.
    Type: Application
    Filed: June 17, 2019
    Publication date: November 10, 2022
    Inventors: Yoshiho Maeda, Toru Miura, Hiroshi Fukuda
  • Publication number: 20220349936
    Abstract: A stage, electric probes, an optical probe, an electric measurement device, an optical measurement device, and a first positioning mechanism are provided. The stage includes a second positioning mechanism that changes relative positional relationship between the electric probes and an electric connection portion of each of the optical elements. The electric probes electrically connect the electric measurement device and each of the optical elements. The optical probe optically connects the optical measurement device and each of the optical elements. The first positioning mechanism changes relative positional relationship between the optical probe and an optical connection portion of each of the optical elements.
    Type: Application
    Filed: June 17, 2019
    Publication date: November 3, 2022
    Inventors: Toru Miura, Yoshiho Maeda, Hiroshi Fukuda
  • Publication number: 20220320361
    Abstract: Provided is a photodetector which can be manufactured in a standard process of a mass-produced CMOS foundry. The photodetector includes a silicon (Si) substrate; a lower clad layer; a core layer including a waveguide layer configured to guide signal light, and including a first Si slab doped with first conductive impurity ions and a second Si slab doped with second conductive impurity ions; a germanium (Ge) layer configured to absorb light and including a Ge region doped with the first conductive impurity ions; an upper clad layer; and electrodes respectively connected to the first and second Si slabs and the Ge region. A region of the core layer sandwiched between the first Si slab and the second Si slab operates as an amplification layer.
    Type: Application
    Filed: August 28, 2019
    Publication date: October 6, 2022
    Inventors: Kotaro Takeda, Kiyofumi Kikuchi, Yoshiho Maeda, Tatsuro Hiraki
  • Patent number: 11442229
    Abstract: An optical waveguide in which a grating coupler is formed, a first pattern region arranged to surround the grating coupler, and a second pattern region arranged to surround the grating coupler are included. The first pattern region and the second pattern region are arranged adjacently. In a periphery of the grating coupler, the first pattern region is formed in a region continuous in a circumferential direction. Similarly, in the periphery of the grating coupler, the second pattern region is formed in a region continuous in the circumferential direction.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: September 13, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Toru Miura, Yoshiho Maeda, Hiroshi Fukuda
  • Patent number: 11415752
    Abstract: An optical inspection circuit includes an optical circuit to be inspected formed on a substrate, an input optical waveguide optically connected to the optical circuit, and an output optical waveguide optically connected to the optical circuit. The input optical waveguide is connected with a grating coupler for input. The grating coupler is connected with the input optical waveguide via a spot size conversion unit. The output optical waveguide is optically connected with a photodiode.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: August 16, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Hiroshi Fukuda, Toru Miura, Yoshiho Maeda
  • Publication number: 20220229317
    Abstract: In an embodiment, an optical inspection circuit includes: an optical modulator comprising an optical waveguide on a substrate, the optical waveguide having a core comprising a semiconductor; a first input waveguide optically connected to the optical modulator, the first input waveguide having a core comprising the semiconductor; an output waveguide optically connected to the optical modulator, the output waveguide having a core comprising the semiconductor; a photodiode on the substrate in a vicinity of the optical modulator; a wire electrically connecting the optical modulator and the photodiode; and a second input waveguide optically connected to the photodiode, the second input waveguide having a core comprising the semiconductor.
    Type: Application
    Filed: May 23, 2019
    Publication date: July 21, 2022
    Inventors: Hiroshi Fukuda, Toru Miura, Yoshiho Maeda
  • Publication number: 20220171134
    Abstract: There is provided an optical waveguide constituted by a core made of a semiconductor and formed on a substrate. A grating coupler is provided at one end of the optical waveguide. Further, a reflecting portion formed on the optical waveguide by being optically coupled to the optical waveguide is provided at the other end of the optical waveguide. The optical waveguide constituted by the core includes a light intensity modulation unit that modulates an intensity of guided light in the optical waveguide. The light intensity modulation unit is constituted by a variable optical attenuator.
    Type: Application
    Filed: April 9, 2020
    Publication date: June 2, 2022
    Inventors: Yoshiho Maeda, Toru Miura, Hiroshi Fukuda
  • Patent number: 11340401
    Abstract: A photodiode including a p-type region and an n-type region formed in a core of a grating coupler is provided. The p-type region and the n-type region are each formed as a region having a rectangular shape extending in an array direction of a grating as seen in plan view and are arranged in a direction orthogonal to the array direction of the grating and parallel to a plane of a substrate. A plurality of the p-type regions and a plurality of the n-type regions are formed and alternately arranged.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: May 24, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Yoshiho Maeda, Toru Miura, Hiroshi Fukuda
  • Patent number: 11264519
    Abstract: A light receiving element includes a first substrate, a photodiode formed on a main surface of the first substrate, and a second substrate constituted by a semiconductor and adhered to a rear surface side of the first substrate by an adhesive layer formed from a resin adhesive. A light receiving element according to an embodiment includes a lens that is formed on the side of an adhesion surface of the second substrate, has a convex surface, and is disposed in a light receiving region of the photodiode. The light receiving side of the photodiode is oriented toward the side of the first substrate. The lens is disposed so that the convex surface thereof is oriented toward the side of a light receiving surface of the photodiode.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: March 1, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Yoshiho Maeda, Fumito Nakajima, Yoshifumi Muramoto, Atsushi Kanda, Kimikazu Sano
  • Publication number: 20220057584
    Abstract: An alignment optical circuit includes: a plurality of grating couplers that are formed on a substrate and arranged on a line; a plurality of optical waveguides that are connected to the plurality of grating couplers, respectively. Further, the alignment optical circuit includes an optical sensor that is formed on the substrate and measures optical intensity at a first light-receiving spot and a second light-receiving spot on a line along an arrangement direction of the plurality of grating couplers.
    Type: Application
    Filed: December 3, 2019
    Publication date: February 24, 2022
    Inventors: Toru Miura, Yoshiho Maeda, Hiroshi Fukuda
  • Publication number: 20220042877
    Abstract: An embodiment optical test circuit includes a first optical circuit and a second optical circuit formed on a substrate, an input optical waveguide optically connected to the first optical circuit and the second optical circuit, and an output optical waveguide optically connected to the first optical circuit and the second optical circuit. The optical test circuit also includes a light emitting diode optically connected to the input optical waveguide, and a photodiode optically connected to the output optical waveguide.
    Type: Application
    Filed: December 13, 2019
    Publication date: February 10, 2022
    Inventors: Hiroshi Fukuda, Toru Miura, Yoshiho Maeda
  • Publication number: 20210231878
    Abstract: Plural grating couplers having grating conditions different from each other and plural optical waveguides respectively connected with the plural grating couplers are included. The plural grating couplers have the same arraying directions of gratings. Further, each of the plural grating couplers has a different grating interval as a grating condition. Further, plural reflection units respectively provided to the plural optical waveguides are included.
    Type: Application
    Filed: May 17, 2019
    Publication date: July 29, 2021
    Inventors: Toru Miura, Yoshiho Maeda, Hiroshi Fukuda
  • Publication number: 20210208339
    Abstract: A photodiode including a p-type region and an n-type region formed in a core of a grating coupler is provided. The p-type region and the n-type region are each formed as a region having a rectangular shape extending in an array direction of a grating as seen in plan view and are arranged in a direction orthogonal to the array direction of the grating and parallel to a plane of a substrate. A plurality of the p-type regions and a plurality of the n-type regions are formed and alternately arranged.
    Type: Application
    Filed: May 23, 2019
    Publication date: July 8, 2021
    Inventors: Yoshiho Maeda, Toru Miura, Hiroshi Fukuda