Abstract: An image processing device comprises a decoder, a sprite buffer interface, and a sprite buffer as well as a rendering engine, a frame buffer interface, and a frame buffer, which is characterized by synchronizing the write timing for the sprite buffer with the read timing for the frame buffer. That is, the decoder decodes compressed image data to restore original image data before compression. The sprite buffer interface writes the decoded data (i.e., sprite pattern data) into the sprite buffer, from which the sprite pattern data are read and supplied to the rendering engine. The rendering engine performs a prescribed rendering process (e.g., magnification, reduction, rotation, deformation, etc.) on the sprite pattern data, which are then written into the frame buffer. A display controller reads rendering-completed data (i.e., display data) from the frame buffer so as to output them to a display.

Abstract: An image processing device comprises a decoder, a sprite buffer interface, and a sprite buffer as well as a rendering engine, a frame buffer interface, and a frame buffer, wherein it is characterized by synchronizing the write timing for the sprite buffer with the read timing for the frame buffer. That is, the decoder decodes compressed image data to restore original image data before compression. The sprite buffer interface writes the decoded data (i.e., sprite pattern data) into the sprite buffer, from which the sprite pattern data are read and supplied to the rendering engine. The rendering engine performs a prescribed rendering process (e.g., magnification, reduction, rotation, deformation, etc.) on the sprite pattern data, which are then written into the frame buffer. A display controller reads rendering-completed data (i.e., display data) from the frame buffer so as to output them to a display.

Abstract: There is provided a method of controlling direct memory access for a digital signal-processing system. Direct memory access (DMA) instructions for executing data transfer by direct memory access between a data memory storing data and an external device are provided in a program, together with arithmetic processing instructions for executing arithmetic processing. The data transfer by the direct memory access is executed between the data memory and the external device according to each of the DMA instructions which has been decoded during execution of the program, upon decoding thereof. There is also provided a digital signal-processing system which causes data transfer by direct memory access to begin. An arithmetic operation device of the system arithmetically processes data read out from a data memory of the same under the control of decoded instructions of a program.