Patents by Inventor Yoshikatsu Maeda

Yoshikatsu Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6087758
    Abstract: A piezoelectric vibration device is constructed to suppress interference between resonance sections and achieve a satisfactory resonance characteristic and sufficient mechanical strength. In the piezoelectric vibration device, a plurality of resonance sections are provided on a piezoelectric substrate and a slit is provided so as to extend from one side of the piezoelectric substrate toward a center thereof in order to suppress interference between the resonance sections. If the length of the slit is denoted as a, the gap width along the opposing direction of the first and second resonance electrodes in the resonance section as g, the distance from the center of the gap to the nearest side of the piezoelectric substrate and the sides of the slit as L.sub.1, and the external dimension of the piezoelectric substrate along one direction as L, then the expression L.sub.1 -g/2=b, b<a.ltoreq.(3/4)L is satisfied.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: July 11, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Taketoshi Hino, Tomoaki Futakuchi, Yoshikatsu Maeda
  • Patent number: 5426374
    Abstract: A piezoelectric body polarizing apparatus including a DC power supply 2 for applying a DC voltage to a piezoelectric body 1 to polarize the piezoelectric body 1, an impedance measuring circuit 4 for measuring the change in impedance of the piezoelectric body 1, a high frequency power supply 5, and a DC current blocking filter 3 connected between a high frequency portion, which is constituted by the impedance measuring circuit 4 and the high frequency power supply 5, and the piezoelectric body 1. The DC current blocking filter 3 includes at least a DC current blocking capacitor C.sub.1 and a transient current bypass capacitor C.sub.2 connected between a node A, between the DC current blocking capacitor C.sub.1 and the high frequency portion, and a ground potential.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: June 20, 1995
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hideto Taka, Yoshikatsu Maeda