Patents by Inventor Yoshikazu Arisaka
Yoshikazu Arisaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7649370Abstract: An evaluation method of a probe mark of a probe needle of a probe card, includes the steps of: forming the probe mark of the probe needle on a probe mark evaluation wafer; recognizing the probe mark with imaging; and overlapping an imaginary electrode pad with the probe mark recognized by imaging so that the probe mark is evaluated.Type: GrantFiled: April 21, 2006Date of Patent: January 19, 2010Assignee: Fujitsu Microelectronics LimitedInventors: Yoshihiko Endou, Yoshikazu Arisaka, Tatsuya Miyazaki
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Patent number: 7471096Abstract: A contactor for electronic parts can provide an appropriate and uniform contact with respect to a plurality of electrode terminals in an electronic part such as an IC. Each of a plurality of contact members has a first contact portion on one end thereof and a second contact portion on the other end thereof, the first contract portion having a recessed portion that receives one of the electrode terminals of the electronic part. A base accommodates and supports the plurality of the contact members. The first contact portion is movable in a horizontal direction.Type: GrantFiled: January 26, 2006Date of Patent: December 30, 2008Assignee: Fujitsu LimitedInventors: Naohito Kohashi, Shigeyuki Maruyama, Yoshikazu Arisaka, Hiroyuki Murotani, Katsuhiko Ono
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Publication number: 20080227226Abstract: A semiconductor substrate eliminates a restriction caused by a width of scribe lines so as to increase a number of semiconductor elements formed on the semiconductor substrate. A plurality of semiconductor element areas are formed by forming a plurality of unit exposed and printed areas, each of which contains the semiconductor element areas. A first scribe line extends between the semiconductor element areas formed within the unit exposed and printed area. A second scribe line extends between the unit exposed and printed areas. A width of the first scribe line is different from a width of the second scribe line.Type: ApplicationFiled: May 20, 2008Publication date: September 18, 2008Applicant: FUJITSU LIMITEDInventors: Shigeru Fujii, Yoshikazu Arisaka, Hitoshi Izuru, Kazuhiro Tashiro, Shigeyuki Maruyama
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Patent number: 7355421Abstract: A semiconductor apparatus testing arrangement for testing a plurality of semiconductor devices produced on a semiconductor substrate, has a substrate on which a plurality of testing units are arranged, each unit comprising a probe needles corresponding to electrode terminals of the semiconductor device and electric conductor parts connected with the probe needles.Type: GrantFiled: January 26, 2006Date of Patent: April 8, 2008Assignee: Fujitsu LimitedInventors: Shigeyuki Maruyama, Yoshikazu Arisaka, Kazuhiro Tashiro, Takayuki Katayama, Tetsu Ozawa, Yuushin Kimura
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Patent number: 7256591Abstract: A probe card is used to test an electronic device. The probe card includes a base plate and a cantilever-type probe arranged on the base plate. The cantilever-type probe has an end that contacts the contacted body and moves when contacting the contacted body. A stopper arranged on the base plate restricts the movement of the cantilever-type probe.Type: GrantFiled: October 31, 2002Date of Patent: August 14, 2007Assignee: Fujitsu LimitedInventors: Tsutomu Tatematsu, Kenji Togashi, Tetsuhiro Nanbu, Shigenobu Ishihara, Morihiko Hamada, Yoshikazu Arisaka, Kunihiro Itagaki, Shigekazu Aoki
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Publication number: 20070170937Abstract: An evaluation method of a probe mark of a probe needle of a probe card, includes the steps of: forming the probe mark of the probe needle on a probe mark evaluation wafer; recognizing the probe mark with imaging; and overlapping an imaginary electrode pad with the probe mark recognized by imaging so that the probe mark is evaluated.Type: ApplicationFiled: April 21, 2006Publication date: July 26, 2007Applicant: FUJITSU LIMITEDInventors: Yoshihiko Endou, Yoshikazu Arisaka, Tatsuya Miyazaki
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Publication number: 20070134824Abstract: A probe card that is manufactured inexpensively. The probe card includes a base plate, a flexible substrate, and a contact probe. The contact probe is a flexible substrate formed from polyimide resin. The contact probe has a plurality of parallel wires. Each wire has a distal end that functions as a contact. The contact probe is produced by cutting a general purpose substrate having a plurality of parallel wires formed at a predetermined pitch. The number of the parallel wires is equal to the number of pads of an LSI chip.Type: ApplicationFiled: January 26, 2007Publication date: June 14, 2007Applicant: FUJITSU LIMITEDInventors: Yoshikazu Arisaka, Kunihiro Itagaki, Shigenobu Ishihara, Tomohiro Giga, Naoyoshi Kikuchi
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Publication number: 20070096761Abstract: A semiconductor apparatus testing arrangement for testing a plurality of semiconductor devices produced on a semiconductor substrate, has a substrate on which a plurality of testing units are arranged, each unit comprising a probe needles corresponding to electrode terminals of the semiconductor device and electric conductor parts connected with the probe needles.Type: ApplicationFiled: January 26, 2006Publication date: May 3, 2007Applicant: FUJITSU LIMITEDInventors: Shigeyuki Maruyama, Yoshikazu Arisaka, Kazuhiro Tashiro, Takayuki Katayama, Tetsu Ozawa, Yuushin Kimura
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Patent number: 7180312Abstract: A probe card that is manufactured inexpensively. The probe card includes a base plate, a flexible substrate, and a contact probe. The contact probe is a flexible substrate formed from polyimide resin. The contact probe has a plurality of parallel wires. Each wire has a distal end that functions as a contact. The contact probe is produced by cutting a general purpose substrate having a plurality of parallel wires formed at a predetermined pitch. The number of the parallel wires is equal to the number of pads of an LSI chip.Type: GrantFiled: March 25, 2003Date of Patent: February 20, 2007Assignee: Fujitsu LimitedInventors: Yoshikazu Arisaka, Kunihiro Itagaki, Shigenobu Ishihara, Tomohiro Giga, Naoyoshi Kikuchi
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Patent number: 7171592Abstract: A semiconductor memory device includes a self-testing circuit and a self-redundancy circuit with simple structures. The self-testing circuit includes a comparison circuit which compares write data with read data with respect to normal memory blocks and redundant memory blocks, and a decision circuit which decides if the semiconductor memory device is good or defective based on the plurality of comparison result signals. A signal transfer and holding circuit is connected between the comparison circuit and the decision circuit to transfer the plurality of comparison result signals to the decision circuit and to supply the plurality of comparison result signals to the self-redundancy circuit as a test result.Type: GrantFiled: February 10, 2003Date of Patent: January 30, 2007Assignee: Fujitsu LimitedInventors: Kenji Togashi, Morihiko Hamada, Shigekazu Aoki, Katsumi Shigenobu, Yukio Saka, Yoshikazu Arisaka, Toyoji Sawada, Tadashi Asai
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Patent number: 7129726Abstract: A testing device can perform a test on an arbitrary one of a plurality of semiconductor devices by pressing the semiconductor devices onto a contactor from a back side of the semiconductor device. A test circuit board has a contactor provided with contact pieces corresponding to external connection terminals of semiconductor devices to be tested. A support board is capable of mounting the semiconductor devices thereon in an aligned state. A stage supports the support board. A press head presses the semiconductor devices to be tested mounted on the support board so as to cause external connection terminals of the semiconductor devices to be tested to contact with the contact pieces of the contactor. The stage is movable to a position at which at least one of the semiconductor devices to be tested, which are mounted on the support board, faces the contactor.Type: GrantFiled: August 25, 2005Date of Patent: October 31, 2006Assignee: Fujitsu LimitedInventors: Kazuhiro Tashiro, Yasuyuki Itou, Shigeyuki Maruyama, Yoshikazu Arisaka
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Publication number: 20060220667Abstract: A testing device can perform a test on an arbitrary one of a plurality of semiconductor devices by pressing the semiconductor devices onto a contactor from a back side of the semiconductor device. A test circuit board has a contactor provided with contact pieces corresponding to external connection terminals of semiconductor devices to be tested. A support board is capable of mounting the semiconductor devices thereon in an aligned state. A stage supports the support board. A press head presses the semiconductor devices to be tested mounted on the support board so as to cause external connection terminals of the semiconductor devices to be tested to contact with the contact pieces of the contactor. The stage is movable to a position at which at least one of the semiconductor devices to be tested, which are mounted on the support board, faces the contactor.Type: ApplicationFiled: August 25, 2005Publication date: October 5, 2006Applicant: FUJITSU LIMITEDInventors: Kazuhiro Tashiro, Yasuyuki Itou, Shigeyuki Maruyama, Yoshikazu Arisaka
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Publication number: 20060186905Abstract: A contactor for electronic parts can provide an appropriate and uniform contact with respect to a plurality of electrode terminals in an electronic part such as an IC. Each of a plurality of contact members has a first contact portion on one end thereof and a second contact portion on the other end thereof, the first contract portion having a recessed portion that receives one of the electrode terminals of the electronic part. A base accommodates and supports the plurality of the contact members. The first contact portion is movable in a horizontal direction.Type: ApplicationFiled: January 26, 2006Publication date: August 24, 2006Applicant: FUJITSU LIMITEDInventors: Naohito Kohashi, Shigeyuki Maruyama, Yoshikazu Arisaka, Hiroyuki Murotani, Katsuhiko Ono
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Publication number: 20060097356Abstract: A semiconductor substrate eliminates a restriction caused by a width of scribe lines so as to increase a number of semiconductor elements formed on the semiconductor substrate. A plurality of semiconductor element areas are formed by forming a plurality of unit exposed and printed areas, each of which contains the semiconductor element areas. A first scribe line extends between the semiconductor element areas formed within the unit exposed and printed area. A second scribe line extends between the unit exposed and printed areas. A width of the first scribe line is different from a width of the second scribe line.Type: ApplicationFiled: February 23, 2005Publication date: May 11, 2006Applicant: FUJITSU LIMITEDInventors: Shigeru Fujii, Yoshikazu Arisaka, Hitoshi Izuru, Kazuhiro Tashiro, Shigeyuki Maruyama
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Patent number: 6686644Abstract: A high-strength protective member made of tungsten is disposed under a disconnecting point of a fuse. This protective member is formed simultaneously with formation of a via contact portion which connects the fuse with wiring, for example.Type: GrantFiled: March 22, 2002Date of Patent: February 3, 2004Assignee: Fujitsu LimitedInventors: Tsutomu Tatematsu, Kengi Togashi, Masayuki Nakada, Toyoji Sawada, Kazuo Sukegawa, Tomoyuki Yamada, Yoshikazu Arisaka
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Publication number: 20030184330Abstract: A probe card that is manufactured inexpensively. The probe card includes a base plate, a flexible substrate, and a contact probe. The contact probe is a flexible substrate formed from polyimide resin. The contact probe has a plurality of parallel wires. Each wire has a distal end that functions as a contact. The contact probe is produced by cutting a general purpose substrate having a plurality of parallel wires formed at a predetermined pitch. The number of the parallel wires is equal to the number of pads of an LSI chip.Type: ApplicationFiled: March 25, 2003Publication date: October 2, 2003Applicant: FUJITSU LIMITEDInventors: Yoshikazu Arisaka, Kunihiro Itagaki, Shigenobu Ishihara, Tomohiro Giga, Naoyoshi Kikuchi
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Publication number: 20030177415Abstract: A semiconductor memory device includes a self-testing circuit and a self-redundancy circuit with simple structures. The self-testing circuit includes a comparison circuit which compares write data with read data with respect to normal memory blocks and redundant memory blocks, and a decision circuit which decides if the semiconductor memory device is good or defective based on the plurality of comparison result signals. A signal transfer and holding circuit is connected between the comparison circuit and the decision circuit to transfer the plurality of comparison result signals to the decision circuit and to supply the plurality of comparison result signals to the self-redundancy circuit as a test result.Type: ApplicationFiled: February 10, 2003Publication date: September 18, 2003Applicant: Fujitsu LimitedInventors: Kenji Togashi, Morihiko Hamada, Shigekazu Aoki, Katsumi Shigenobu, Yukio Saka, Yoshikazu Arisaka, Toyoji Sawada, Tadashi Asai
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Publication number: 20030098702Abstract: An inexpensive probing card that has probe pins for contacting pads with high reliability. The probe pins are arranged on a base plate. The probe pins move along the pads when contacting the pads. A stopper restricts the movement of the probe pins.Type: ApplicationFiled: March 29, 2002Publication date: May 29, 2003Applicant: Fujitsu LimitedInventors: Tsutomu Tatematsu, Kenji Togashi, Tetsuhiro Nanbu, Shigenobu Ishihara, Morihiko Hamada, Yoshikazu Arisaka, Kunihiro Itagaki
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Publication number: 20030098701Abstract: An inexpensive probing card that has probe pins for contacting pads with high reliability. The probe pins are arranged on a base plate. The probe pins move along the pads when contacting the pads. A stopper restricts the movement of the probe pins.Type: ApplicationFiled: October 31, 2002Publication date: May 29, 2003Applicant: Fujitsu LimitedInventors: Tsutomu Tatematsu, Kenji Togashi, Tetsuhiro Nanbu, Shigenobu Ishihara, Morihiko Hamada, Yoshikazu Arisaka, Kunihiro Itagaki, Shigekazu Aoki
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Publication number: 20020153588Abstract: A high-strength protective member made of tungsten is disposed under a disconnecting point of a fuse. This protective member is formed simultaneously with formation of a via contact portion which connects the fuse with wiring, for example.Type: ApplicationFiled: March 22, 2002Publication date: October 24, 2002Applicant: Fujitsu Limited of KawasakiInventors: Tsutomu Tatematsu, Kengi Togashi, Masayuki Nakada, Toyoji Sawada, Kazuo Sukegawa, Tomoyuki Yamada, Yoshikazu Arisaka