Patents by Inventor Yoshikazu Eguchi

Yoshikazu Eguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942641
    Abstract: Resin-adhered graphite particles are obtained by causing a modified novolac-type phenolic resin to adhere to graphite particles. At least part of surfaces of the graphite particles is coated with a carbonaceous coating by heating the resin-adhered graphite particles in a non-oxidizing atmosphere at 900 to 1,500° C. to carbonize the modified novolac-type phenolic resin. Arylene groups having hydroxy groups account for 5 to 95 mol % of arylene groups constituting the modified novolac-type phenolic resin. The obtained carbonaceous substance-coated graphite particles exhibit excellent battery properties when used as a negative electrode material for a lithium ion secondary battery.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: March 26, 2024
    Assignees: JFE Chemical Corporation, Sumitomo Bakelite Co., Ltd.
    Inventors: Ryuta Haga, Motoharu Obika, Kunihiko Eguchi, Yoshikazu Kobayashi, Masakatsu Asami
  • Patent number: 11754872
    Abstract: An electro-optical device includes a first substrate, a second substrate, a liquid crystal layer, a pixel electrode, alight shielding portion, a lens being arranged between the light shielding portion and the pixel electrode and overlapping with the pixel electrode in plan view, and a phase difference compensation member arranged on an incident side of the light with respect to the liquid crystal layer and compensating a phase difference of the light in the liquid crystal layer. In a display region, a light shielding member having a light shielding property is provided between the liquid crystal layer and the phase difference compensation member. The lens includes a first layer arranged on a side of the light shielding portion and a second layer being arranged on a side of the pixel electrode and having a refractive index different from that of the first layer.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: September 12, 2023
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Yoshikazu Eguchi
  • Publication number: 20220299818
    Abstract: An electro-optical device includes a first substrate, a second substrate, a liquid crystal layer, a pixel electrode, alight shielding portion, a lens being arranged between the light shielding portion and the pixel electrode and overlapping with the pixel electrode in plan view, and a phase difference compensation member arranged on an incident side of the light with respect to the liquid crystal layer and compensating a phase difference of the light in the liquid crystal layer. In a display region, a light shielding member having a light shielding property is provided between the liquid crystal layer and the phase difference compensation member. The lens includes a first layer arranged on a side of the light shielding portion and a second layer being arranged on a side of the pixel electrode and having a refractive index different from that of the first layer.
    Type: Application
    Filed: March 16, 2022
    Publication date: September 22, 2022
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Yoshikazu EGUCHI
  • Patent number: 9791692
    Abstract: An electrooptical device includes a substrate, a mirror that is made up of a plurality of films which are arranged so as to be separated from the substrate on one plane of the substrate, and a supporting portion that is arranged between the substrate and the mirror, and has a portion which is connected to a portion of the mirror so as to support the mirror, in which the mirror includes a third mirror film which is a reflective metal film that is arranged on a side of the mirror which is opposite to the substrate, a second mirror film which is a high melting point metal film that is arranged between the reflective metal film and the substrate, and a first mirror film which is an antioxidative film that is arranged between the high melting point metal film and the substrate.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: October 17, 2017
    Assignee: Seiko Epson Corporation
    Inventor: Yoshikazu Eguchi
  • Patent number: 9746586
    Abstract: A microlens array substrate includes a substrate. A plurality of first recesses are provided in a first area of a surface of the substrate. A plurality of second recesses are provided in a second area of the surface of the substrate. The second area is outside of the first area. A light transmission layer has a refractive index which is different from a refractive index of the substrate and is provided to cover the surface of the substrate and to bury the first recesses and the second recesses. Each of the first recesses has a first depth from a surface of the light transmission layer. Each of the second recesses has a second depth from the surface of the light transmission layer. The second depth is deeper than the first depth.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: August 29, 2017
    Assignee: Seiko Epson Corporation
    Inventor: Yoshikazu Eguchi
  • Publication number: 20160202549
    Abstract: A microlens array substrate includes a substrate. A plurality of first recesses are provided in a first area of a surface of the substrate. A plurality of second recesses are provided in a second area of the surface of the substrate. The second area is outside of the first area. A light transmission layer has a refractive index which is different from a refractive index of the substrate and is provided to cover the surface of the substrate and to bury the first recesses and the second recesses. Each of the first recesses has a first depth from a surface of the light transmission layer. Each of the second recesses has a second depth from the surface of the light transmission layer. The second depth is deeper than the first depth.
    Type: Application
    Filed: March 18, 2016
    Publication date: July 14, 2016
    Inventor: Yoshikazu Eguchi
  • Patent number: 9383602
    Abstract: A liquid crystal layer is disposed between an element substrate and an opposite substrate and a pixel electrode being light-reflective is disposed between an element substrate and a liquid crystal layer, and a planarization layer that is light-transmissive, a first light-transmissive film that has a high refractive index than a refractive index of the planarization layer, a second light-transmissive film that has a lower refractive index than the refractive index of the first light-transmissive film, and a third light-transmissive film that is electrically conductive and has a higher refractive index than the refractive index of the second light-transmissive film are disposed between the opposite substrate and the liquid crystal layer from the opposite substrate side in this order.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: July 5, 2016
    Assignee: Seiko Epson Corporation
    Inventor: Yoshikazu Eguchi
  • Patent number: 9316767
    Abstract: There is provided a method of manufacturing a microlens array substrate with improved manufacturing yield and high quality, the method including: forming a groove part along an outer edge of a first area on a surface of a substrate; forming a mask layer to cover a side of the surface, forming a plurality of openings in the first area, and forming openings along the outer edge of the first area; performing isotropic etching on the substrate through the mask layer, forming a plurality of recesses in the first area, and forming recesses across a boundary part between the first area and the groove part; removing the mask layer from the substrate; forming a light transmission material layer that has a refractive index, which is different from a refractive index of the substrate, to cover the side of the surface of the substrate and to bury the plurality of recesses; and planarizing an upper surface of the light transmission material layer.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: April 19, 2016
    Assignee: Seiko Epson Corporation
    Inventor: Yoshikazu Eguchi
  • Publication number: 20160025901
    Abstract: An electrooptical device includes a substrate, a mirror that is arranged so as to be separated from the substrate on one surface of the substrate, a side wall that is arranged between the substrate and the mirror, and has a portion which is connected to a portion of the mirror so as to support the mirror, a light transmitting cover base material that seals at least the side wall and the mirror, and a first transparent stacked film that is arranged on one surface of the cover base material, in which the first transparent stacked film includes a conductive film.
    Type: Application
    Filed: July 9, 2015
    Publication date: January 28, 2016
    Inventor: Yoshikazu Eguchi
  • Publication number: 20160025965
    Abstract: An electrooptical device includes a substrate, a mirror that is made up of a plurality of films which are arranged so as to be separated from the substrate on one plane of the substrate, and a supporting portion that is arranged between the substrate and the mirror, and has a portion which is connected to a portion of the mirror so as to support the mirror, in which the mirror includes a third mirror film which is a reflective metal film that is arranged on a side of the mirror which is opposite to the substrate, a second mirror film which is a high melting point metal film that is arranged between the reflective metal film and the substrate, and a first mirror film which is an antioxidative film that is arranged between the high melting point metal film and the substrate.
    Type: Application
    Filed: July 23, 2015
    Publication date: January 28, 2016
    Inventor: Yoshikazu Eguchi
  • Publication number: 20150092139
    Abstract: There is provided a method of manufacturing a microlens array substrate with improved manufacturing yield and high quality, the method including: forming a groove part along an outer edge of a first area on a surface of a substrate; forming a mask layer to cover a side of the surface, forming a plurality of openings in the first area, and forming openings along the outer edge of the first area; performing isotropic etching on the substrate through the mask layer, forming a plurality of recesses in the first area, and forming recesses across a boundary part between the first area and the groove part; removing the mask layer from the substrate; forming a light transmission material layer that has a refractive index, which is different from a refractive index of the substrate, to cover the side of the surface of the substrate and to bury the plurality of recesses; and planarizing an upper surface of the light transmission material layer.
    Type: Application
    Filed: September 9, 2014
    Publication date: April 2, 2015
    Inventor: Yoshikazu Eguchi
  • Publication number: 20110157506
    Abstract: Scanning lines and capacitive lines or data lines and the capacitive lines are partially overlapped between reflective electrodes.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 30, 2011
    Applicant: Seiko Epson Corporation
    Inventor: Yoshikazu Eguchi
  • Patent number: 7342638
    Abstract: According to an aspect of the invention, to completely planarize the outermost surface of a laminated structure by appropriately performing a planarizing process, such as a CMP process, in an electro-optical device, such as a liquid crystal device, an electro-optical device includes TFTs that constitute driving circuits to drive data lines and scanning lines that are arranged in a peripheral region around an image display region, and an interlayer insulating film formed on the data lines, scanning lines, TFTs, and the driving circuits. In the interlayer insulating film formed in the peripheral region, after an etching process is performed on at least portions corresponding to regions in which the driving circuits are formed, a CMP process is performed on the peripheral region and the image display region.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: March 11, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Yoshikazu Eguchi
  • Publication number: 20050007356
    Abstract: According to an aspect of the invention, to completely planarize the outermost surface of a laminated structure by appropriately performing a planarizing process, such as a CMP process, in an electro-optical device, such as a liquid crystal device, an electro-optical device includes TFTs that constitute driving circuits to drive data lines and scanning lines that are arranged in a peripheral region around an image display region, and an interlayer insulating film formed on the data lines, scanning lines, TFTs, and the driving circuits. In the interlayer insulating film formed in the peripheral region, after an etching process is performed on at least portions corresponding to regions in which the driving circuits are formed, a CMP process is performed on the peripheral region and the image display region.
    Type: Application
    Filed: May 17, 2004
    Publication date: January 13, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Yoshikazu Eguchi
  • Patent number: 5296407
    Abstract: Manufacturing a void-free metal-filled contact by forming an insulation layer about 2,000 .ANG. thick between a substrate and a first conductive layer, forming openings, or contact holes, through the dielectric layer, forming a foundation metal system comprising an approximately 150 .ANG. thick Ti layer, an approximately 1,000 .ANG. thick TiN layer, an approximately 150 .ANG. thick Ti layer and an approximately 1,000 .ANG. thick Pt layer, patterning photoresist over the foundation metal system such that developed photoresist remains only where a conductive material is not desired, forming a conductive layer of gold by a plating process, stripping the photoresist, and ion milling to remove the foundation metal system that exists outside the contact holes. A second insulator layer is deposited and etched back until the gold film is exposed. A metal layer is deposited and patterned so that electrical connection can be made between the contacts and other parts of the circuitry.
    Type: Grant
    Filed: March 5, 1993
    Date of Patent: March 22, 1994
    Assignee: Seiko Epson Corporation
    Inventor: Yoshikazu Eguchi