Patents by Inventor Yoshikazu Hatazawa

Yoshikazu Hatazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10914846
    Abstract: An image sensor includes: a switching element disposed on a substrate; a photoelectric conversion element connected to the switching element; a first protective film directly covering the photoelectric conversion element; and a first organic film formed at a layer above the switching element, the first organic film being in contact with the first protective film, wherein the first organic film covers a first end portion of the photoelectric conversion element, the first end portion being at least a part of an end portion of the photoelectric conversion element, wherein the first organic film has a first covering portion at an end of the first organic film, wherein the first covering portion covers the first end portion, wherein the first covering portion is inclined down towards the photoelectric conversion element, and wherein the first organic film covers only the first end portion of the photoelectric conversion element.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: February 9, 2021
    Assignee: TIANMA JAPAN, LTD.
    Inventors: Shuhei Nara, Hiroyuki Sekine, Takayuki Ishino, Fuminori Tamura, Yoshikazu Hatazawa
  • Patent number: 10615201
    Abstract: In manufacturing an image sensor for FPD having an oxide semiconductor TFT as a switching element, a large amount of hydrogen contained in raw gas is diffused in the oxide semiconductor at the time of forming a-Si photo diode (PD) which is a photoelectric conversion element, causing significant variation in the characteristic of TFT which may thereby not operate. In an image sensor in which an oxide semiconductor TFT and a-Si PD are formed on a substrate in this order, a gas barrier film is disposed between the oxide semiconductor TFT and the PD, and the drain terminal (drain metal) of the oxide semiconductor TFT is connected to one terminal (lower electrode) of the PD via connection wiring (bridge wiring) formed on a protective film arranged over the PD.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: April 7, 2020
    Assignee: TIANMA MICROELECTRONICS CO., LTD.
    Inventors: Hiroyuki Sekine, Takayuki Ishino, Yusuke Yamamoto, Yoshikazu Hatazawa, Fuminori Tamura
  • Publication number: 20200003911
    Abstract: An image sensor includes: a switching element disposed on a substrate; a photoelectric conversion element connected to the switching element; a first protective film directly covering the photoelectric conversion element; and a first organic film formed at a layer above the switching element, the first organic film being in contact with the first protective film, wherein the first organic film covers a first end portion of the photoelectric conversion element, the first end portion being at least a part of an end portion of the photoelectric conversion element, wherein the first organic film has a first covering portion at an end of the first organic film, wherein the first covering portion covers the first end portion, wherein the first covering portion is inclined down towards the photoelectric conversion element, and wherein the first organic film covers only the first end portion of the photoelectric conversion element.
    Type: Application
    Filed: July 2, 2019
    Publication date: January 2, 2020
    Inventors: Shuhei NARA, Hiroyuki SEKINE, Takayuki ISHINO, Fuminori TAMURA, Yoshikazu HATAZAWA
  • Patent number: 10263116
    Abstract: For improved high-definition of liquid crystal display devices and the use thereof in bright places, luminance of backlights is being increased. Thus, when a light-shielding layer is employed for suppressing a light leakage current, characteristic fluctuations of transistors are caused, which may result in showing faulty display. In a dual-gate thin film transistor having a floating light-shielding layer, the layout is designed in such a manner that the film thickness of the insulating layer is equal to or more than 200 nm and equal to or less than 500 nm and that Sg/Sd becomes 4.7 or more, provided that an opposing area between the light-shielding layer and a drain region in a place at the outermost side of the active layer is Sd and the opposing area between the light-shielding layer and the gate electrode is Sg.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: April 16, 2019
    Assignee: NLT TECHNOLOGIES, LTD.
    Inventors: Nobuya Seko, Yoshikazu Hatazawa, Hiroyuki Sekine
  • Publication number: 20170250214
    Abstract: In manufacturing an image sensor for FPD having an oxide semiconductor TFT as a switching element, a large amount of hydrogen contained in raw gas is diffused in the oxide semiconductor at the time of forming a-Si photo diode (PD) which is a photoelectric conversion element, causing significant variation in the characteristic of TFT which may thereby not operate. In an image sensor in which an oxide semiconductor TFT and a-Si PD are formed on a substrate in this order, a gas barrier film is disposed between the oxide semiconductor TFT and the PD, and the drain terminal (drain metal) of the oxide semiconductor TFT is connected to one terminal (lower electrode) of the PD via connection wiring (bridge wiring) formed on a protective film arranged over the PD.
    Type: Application
    Filed: February 1, 2017
    Publication date: August 31, 2017
    Inventors: Hiroyuki SEKINE, Takayuki ISHINO, Yusuke YAMAMOTO, Yoshikazu HATAZAWA, Fuminori TAMURA
  • Publication number: 20150311351
    Abstract: For improved high-definition of liquid crystal display devices and the use thereof in bright places, luminance of backlights is being increased. Thus, when a light-shielding layer is employed for suppressing a light leakage current, characteristic fluctuations of transistors are caused, which may result in showing faulty display. In a dual-gate thin film transistor having a floating light-shielding layer, the layout is designed in such a manner that the film thickness of the insulating layer is equal to or more than 200 nm and equal to or less than 500 nm and that Sg/Sd becomes 4.7 or more, provided that an opposing area between the light-shielding layer and a drain region in a place at the outermost side of the active layer is Sd and the opposing area between the light-shielding layer and the gate electrode is Sg.
    Type: Application
    Filed: April 24, 2015
    Publication date: October 29, 2015
    Inventors: Nobuya SEKO, Yoshikazu HATAZAWA, Hiroyuki SEKINE
  • Patent number: 6759283
    Abstract: A method of fabricating a thin film transistor, includes the steps of (a) forming a gate electrode on an electrically insulating substrate, (b) forming a gate insulating film on the electrically insulating substrate, covering the gate electrode therewith, (c) forming a semiconductor layer on the gate insulating film above the gate electrode, (d) forming source and drain electrodes both making electrical contact with the semiconductor layer, (e) patterning the semiconductor layer into a channel, (f) applying first plasma to the semiconductor layer through the use of a first gas, and (g) applying second plasma to the semiconductor layer through the use of a second gas, and (h) forming an electrically insulating film covering the semiconductor layer therewith.
    Type: Grant
    Filed: May 15, 2002
    Date of Patent: July 6, 2004
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Kyounei Yasuda, Satoshi Ihida, Jukoh Funaki, Manabu Oyama, Yoshikazu Hatazawa
  • Publication number: 20020171084
    Abstract: A method of fabricating a thin film transistor, includes the steps of (a) forming a gate electrode on an electrically insulating substrate, (b) forming a gate insulating film on the electrically insulating substrate, covering the gate electrode therewith, (c) forming a semiconductor layer on the gate insulating film above the gate electrode, (d) forming source and drain electrodes both making electrical contact with the semiconductor layer, (e) patterning the semiconductor layer into a channel, (f) applying first plasma to the semiconductor layer through the use of a first gas, and (g) applying second plasma to the semiconductor layer through the use of a second gas, and (h) forming an electrically insulating film covering the semiconductor layer therewith.
    Type: Application
    Filed: May 15, 2002
    Publication date: November 21, 2002
    Inventors: Kyounei Yasuda, Satoshi Ihida, Jukoh Funaki, Manabu Oyama, Yoshikazu Hatazawa