Patents by Inventor Yoshikazu Hosokawa

Yoshikazu Hosokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4954855
    Abstract: A thin film transistor formed on an insulating sulstrate is disclosed in which metal silicide layers are formed in a thin film made of a monocrystalline, polycrystalline, or amorphous semiconductor material, to be used as source and drain regions, and further a gate electrode includes a metal silicide layer.
    Type: Grant
    Filed: October 28, 1987
    Date of Patent: September 4, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Akio Mimura, Yoshikazu Hosokawa, Takaya Suzuki, Takashi Aoyama, Nobutake Konishi, Yutaka Misawa, Kenji Miyata
  • Patent number: 4942441
    Abstract: Complementary thin fillm transistors (C-TFT) formed on an insulating substrate, comprising a pair of highly resistive n-type silicon islands, a pair of heavily doped n-type regions formed in one of the islands to form source and drain regions of n-channel TFT, a pair of contacts formed on the surface of the other island and establishing a high potential barrier when the underlying region is of n-type and a low potential barrier when the underlying region is inverted to be of p-type. The process for manufacturing complementary TFTs can be simplified significantly.
    Type: Grant
    Filed: March 27, 1987
    Date of Patent: July 17, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Nobutake Konishi, Yoshikazu Hosokawa, Akio Mimura, Takaya Suzuki, Jun-ichi Ohwada, Hideaki Kawakami, Kenji Miyata
  • Patent number: 4746961
    Abstract: This invention relates to the structure of a field effect transistor, which is suitable for liquid crystal display of an active matrix scheme and there is disclosed a new structure for the field effect transistor, in which at least one of the source region and the drain region is of multi-layered structure, in which high impurity concentration portions and low impurity concentration portions are alternately superposed on each other.
    Type: Grant
    Filed: June 8, 1987
    Date of Patent: May 24, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Nobutake Konishi, Kenji Miyata, Yoshikazu Hosokawa, Takaya Suzuki, Akio Mimura
  • Patent number: 4654691
    Abstract: Field plates for relaxing electric fields are provided for an active element in a semiconductor integrated circuit. A field plate integral with an electrode making ohmic contact with an elongated strip shaped diffusion region and extending beyond a pn-junction formed between the diffusion region and an adjacent region to surround the pn-junction has a larger width at its opposite ends than a width at its linear portions. A high breakdown voltage can be obtained by thus configuring the field plate without changing the diffusion region in size.
    Type: Grant
    Filed: January 7, 1986
    Date of Patent: March 31, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Toshikatsu Shirasawa, Yoshikazu Hosokawa
  • Patent number: 4063115
    Abstract: A semiconductor switch assuring the easy formation of a semiconductor integrated circuit and having high control sensitivity while maintaining high dv/dt - immunity, which comprises a PNPN switch of an equivalently four-layered structure including at least three PN-junctions, an anode and a cathode, switching means including a control terminal and connected with the PNPN switch to shunt one of the three PN-junctions at either one end of the PNPN switch, amplifying means, and a capacitive element for differentiating a voltage applied between the anode and the cathode of the PNPN switch to allow a current to flow into the control terminal of the switching means through the amplifying means, so that the switching means is driven by the current thereby to short-circuit the one of three PN-junctions.
    Type: Grant
    Filed: September 3, 1976
    Date of Patent: December 13, 1977
    Assignee: Hitachi, Ltd.
    Inventors: Shinzi Okuhara, Yoshikazu Hosokawa, Tatsuya Kamei, Masayoshi Suzuki
  • Patent number: 3958268
    Abstract: A thyristor highly proof against dv/dt in which to prevent malignition due to the displacement current produced by the application of an abruptly rising forward voltage or the internal leakage current increasing with the temperature rise of the semiconductor substrate, an auxiliary electrode is provided to the intermediate region adjacent to one of the outermost regions of the semiconductor substrate to which two main electrodes, anode and cathode, are provided, the auxiliary electrode and the main electrode on the one outermost region being connected electrically, and a control region having the opposite conductivity type to that of the intermediate region is formed in the intermediate region between the auxiliary electrode and the main electrode on the one outermost region, the control region being provided with a gate electrode.
    Type: Grant
    Filed: May 3, 1974
    Date of Patent: May 18, 1976
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuya Kamei, Yoshikazu Hosokawa