Patents by Inventor Yoshikazu Kumagaya

Yoshikazu Kumagaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090243092
    Abstract: A semiconductor device includes a semiconductor element; a plate member disposed opposite to an electronic-circuit forming portion of the semiconductor element; and an elastic body arranged in a compressed state between the semiconductor element and the plate member, wherein the elastic body includes at least one first protruding portion at one end in an extension direction of the elastic body, the first protruding portion being formed opposite to the electronic-circuit forming portion of the semiconductor element, and the semiconductor element and the plate member are fastened by an adhesive agent.
    Type: Application
    Filed: November 21, 2008
    Publication date: October 1, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Takao NISHIMURA, Yoshikazu KUMAGAYA
  • Publication number: 20080224325
    Abstract: A wiring board includes a main surface where an electronic component is mounted in a face-down manner so that a surface of the electronic component having plurality of external connecting terminals faces the main surface of the wiring board, the electronic component being fixed to the wiring board by an adhesive; an insulating layer formed on the main surface where the electronic component is mounted; an opening part formed in the insulating layer so that a plurality of adjacent wiring patterns are commonly and partially opened, the adjacent wiring patterns having electrodes where electrodes of the electronic component are connected; wherein an outer periphery of the opening part situated at a center side of the wiring board is formed in an oblique direction against extending directions of the wiring patters.
    Type: Application
    Filed: March 13, 2008
    Publication date: September 18, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Takao NISHIMURA, Yoshikazu KUMAGAYA
  • Publication number: 20070132102
    Abstract: A relay board provided in a semiconductor device, including an entire main surface that is made of a conductive material. The relay board may further include a substrate made of the same material as at least one semiconductor element provided in the semiconductor device. The main surface of the relay board may be formed at an upper part of the substrate.
    Type: Application
    Filed: March 17, 2006
    Publication date: June 14, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Takao Nishimura, Yoshiaki Narisawa, Yoshikazu Kumagaya
  • Publication number: 20060289972
    Abstract: A semiconductor device includes a semiconductor element having a main surface where an outside connection terminal pad is provided. The semiconductor element is connected to a conductive layer on a supporting board via a plurality of convex-shaped outside connection terminals provided on the outside connection terminal pad and a connection member; and the connection member commonly covers the convex-shaped outside connection terminals.
    Type: Application
    Filed: June 26, 2006
    Publication date: December 28, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Takao Nishimura, Yoshikazu Kumagaya, Akira Takashima, Kouichi Nakamura, Kazuyuki Aiba
  • Patent number: 6869819
    Abstract: A high-contrast image recognition can be performed by recognizing an image of a recognition mark from a back surface of a wafer by a visible-light camera by irradiating a visible light from a circuit pattern surface of a silicon substrate. A thickness of the silicon substrate is set to 5 ?m to 50 ?m. A white or visible light having a wavelength equal to or less than 800 nm is irradiated onto the circuit-pattern forming surface of the substrate. A visible light that has transmitted through the silicon substrate is received by a visible-light camera on a side of a back surface of the silicon substrate. An image of a recognition mark formed on the circuit-pattern forming surface of the silicon substrate is recognized by the visible-light camera.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: March 22, 2005
    Assignee: Fujitsu Limited
    Inventors: Mitsuhisa Watanabe, Yoshikazu Kumagaya, Akira Takashima
  • Publication number: 20030224540
    Abstract: A high-contrast image recognition can be performed by recognizing an image of a recognition mark from a back surface of a wafer by a visible-light camera by irradiating a visible light from a circuit pattern surface of a silicon substrate. A thickness of the silicon substrate is set to 5 &mgr;m to 50 &mgr;m. A white or visible light having a wavelength equal to or less than 800 nm is irradiated onto the circuit-pattern forming surface of the substrate. A visible light that has transmitted through the silicon substrate is received by a visible-light camera on a side of a back surface of the silicon substrate. An image of a recognition mark formed on the circuit-pattern forming surface of the silicon substrate is recognized by the visible-light camera.
    Type: Application
    Filed: December 18, 2002
    Publication date: December 4, 2003
    Applicant: Fujitsu Limited
    Inventors: Mitsuhisa Watanabe, Yoshikazu Kumagaya, Akira Takashima
  • Patent number: 6457633
    Abstract: A method of forming a semiconductor device mounts solder balls on a resin board which has holes formed therethrough and conductive sheets formed therebeneath to cover bottom ends of the holes. The method includes the steps of applying solder paste on the holes, melting the solder paste by heat to make solder of the solder paste flow into the holes and establish contact with the conductive sheets, and connecting the solder balls to the solder filled in the holes.
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: October 1, 2002
    Assignee: Fujitsu Limited
    Inventors: Akira Takashima, Kazuya Kamimura, Yoshikazu Kumagaya
  • Publication number: 20010028101
    Abstract: The semiconductor device includes a semiconductor chip, a tape for mounting the semiconductor chip thereto, an adhesive resin layer interposed between the semiconductor chip and the tape, and solder balls attached to the tape. The method of fabricating the semiconductor chip comprises the step of forming at least one hole in the tape, after fixing the semiconductor chip to the tape through the adhesive resin layer. Also, the TAB tape is made of polyimide having high water permeability.
    Type: Application
    Filed: April 18, 2001
    Publication date: October 11, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Fumihiko Taniguchi, Koji Honna, Yoshikazu Kumagaya
  • Patent number: 6291895
    Abstract: The semiconductor device includes a semiconductor chip, a tape for mounting the semiconductor chip thereto, an adhesive resin layer interposed between the semiconductor chip and the tape, and solder balls attached to the tape. The method of fabricating the semiconductor chip comprises the step of forming at least one hole in the tape, after fixing the semiconductor chip to the tape through the adhesive resin layer. Also, the TAB tape is made of polyimide having high water permeability.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: September 18, 2001
    Assignee: Fujitsu Limited
    Inventors: Fumihiko Taniguchi, Koji Honna, Yoshikazu Kumagaya
  • Patent number: 6281571
    Abstract: External connection electrodes can be positively mounted on a substrate when the pitch between the external connection electrodes is reduced and the diameter of each through hole formed in the substrate is reduced. A semiconductor chip is mounted on a first surface of a tape substrate. Electrode films are formed on the first surface of the tape substrate, each of the electrode films electrically connected to the semiconductor chip. External connection electrodes are provided on a second surface of the tape substrate, each of the external connection electrodes connected to a respective one of the electrode films via a through hole formed in the tape substrate. The external connection electrodes are formed on the electrode films by plating. A diameter S1 of a portion of each of the external connection electrodes protruding from the second surface of the tape substrate and a diameter S2 of the through hole satisfy a relationship S1≦S2.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: August 28, 2001
    Assignee: Fujitsu Limited
    Inventors: Akira Takashima, Fumihiko Ando, Mitsuru Sato, Takashi Suzuki, Yoshikazu Kumagaya, Kazunari Kosakai
  • Patent number: 5953592
    Abstract: The semiconductor device includes a semiconductor chip, a tape for mounting the semiconductor chip thereto, an adhesive resin layer interposed between the semiconductor chip and the tape, and solder balls attached to the tape. The method of fabricating the semiconductor chip comprises the step of forming at least one hole in the tape, after fixing the semiconductor chip to the tape through the adhesive resin layer. Also, the TAB tape is made of polyimide having high water permeability.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: September 14, 1999
    Assignee: Fujitsu Limited
    Inventors: Fumihiko Taniguchi, Koji Honna, Yoshikazu Kumagaya