Patents by Inventor Yoshikazu Kuze

Yoshikazu Kuze has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4948043
    Abstract: A wax-pellet thermostat having a valve seat, a piston secured to the valve, a guide member slidably mounted on the piston, a valve secured to the guide member, a disphragm secured to the guide member, and a wax provided in the cylinder. A gap is provided in the guide member around the piston so as to accumulate coolant which has entered along the piston. The gap is provided to discharge the coolant from the guide member when the wax expands to cause a part of the diaphragm to enter into the gap.
    Type: Grant
    Filed: July 20, 1989
    Date of Patent: August 14, 1990
    Inventor: Yoshikazu Kuze
  • Patent number: 4828167
    Abstract: A wax-pellet thermostat having a valve seat, a piston secured to the valve, a guide member slidably mounted on the piston, a valve secured to the guide member, a diaphragm secured to the guide member, and a wax provided in the cylinder. A gap is provided in the guide member around the piston so as to accumulate coolant which has entered along the piston. The gap is provided to discharge the coolant from the guide member when the wax expands to cause a part of the diaphragm to enter into the gap.
    Type: Grant
    Filed: June 11, 1987
    Date of Patent: May 9, 1989
    Inventor: Yoshikazu Kuze
  • Patent number: 4815112
    Abstract: A read-only sequence control system comprises a control unit having counters for determining the cycle time of the system and timing for the performance of various operations an EPROM and a plurality of relays responsive to data outputs of the EPROM for controlling a machine. The system has a first sensor for detecting the entrance of a work part into the machine and a second sensor for detecting discharge of the entered work part. When the second sensor does not detect the work at an end of working cycle, the control unit operates to stop the machine.
    Type: Grant
    Filed: June 2, 1987
    Date of Patent: March 21, 1989
    Inventor: Yoshikazu Kuze
  • Patent number: 4679530
    Abstract: A cooling system has a first passage communicating an outlet of water jackets with an inlet of a radiator, a second passage communicating an outlet of the radiator with an inlet of a water pump, and a bypass connected between the first passage and a thermostat housing. A thermostat comprising a thermo-sensitive device and a valve is disposed in the second passage, so that the valve closes the second passage. The thermo-sensitive device is disposed in the bypass, so that the thermo-sensitive device is exposed to coolant passing the bypass.
    Type: Grant
    Filed: February 18, 1986
    Date of Patent: July 14, 1987
    Inventor: Yoshikazu Kuze
  • Patent number: 4675513
    Abstract: When supply voltage is first supplied to an EPROM programmer, the system is placed in an erase check mode. An EPROM is attached to the device, and an erase check switch is depressed. If there is no abnormality in the EPROM, a ring counter operates to change the system to a write mode. A program sheet is inserted into the device from one side up to a predetermined position and taken out from the other side. After that, writing data into a RAM, programming of the EPROM dependent on the data in the RAM, and verify checking of the programmed EPROM are sequentially operated automatically by output signals from the ring counter. If an abnormality is detected in the erase check mode or verify check mode, the abnormality is indicated and the ring counter is reset to return the initial state. Thus, the EPROM can be replaced for re-programming operation.
    Type: Grant
    Filed: December 27, 1984
    Date of Patent: June 23, 1987
    Inventor: Yoshikazu Kuze
  • Patent number: 4658347
    Abstract: A read-only sequence controller comprises a control unit and an output relay unit detachably attached to the control unit and having an erasable programmable read only memory or EPROM and a plurality of relays responsive to data output of the EPROM for controlling a machine. The control unit produces outputs for addressing the EPROM for operating the machine.
    Type: Grant
    Filed: January 14, 1985
    Date of Patent: April 14, 1987
    Inventor: Yoshikazu Kuze
  • Patent number: 4467458
    Abstract: A small size sequence controller for a read-only memory in which data stored in a read-only memory (4) are read out sequentially to operate an output relay during a time interval in accordance with the stored data, and the relay controls a load. Clock pulses generated by a frequency-dividing clock pulse generator (36) are applied to presettable down counters (38), (39) in which the clock pulses are divided down to pulses each having the time period corresponding to the preset value. The divided pulses are applied to a binary counter (34). Predetermined data are stored in the read-only memory (4) in advance. When addresses are allocated by the binary counter (34), data outputs (D1)-(D8) deliver "1" or "0" data in parallel. The data outputs are applied to an output relay which is rendered "ON" or "OFF" in accordance with the data "1" or "0".
    Type: Grant
    Filed: June 26, 1981
    Date of Patent: August 21, 1984
    Inventor: Yoshikazu Kuze
  • Patent number: 4456967
    Abstract: A write-only sequence controller in which data regarding the period of time in one cycle is divided into data "1" and data "0" which are designated by the number of the clock pulse. To this end, the system is provided with ten key switches for converting the data "1" and data "0" into the number of the clock pulse and an encoder for converting the number of the clock pulse into BCD codes. The BCD codes are set in presettable counter which counts the clock pulse from a clock pulse generating circuit through gate circuits. The system is further provided with a binary counter for counting the clock pulse applied to the presettable counter, memory RAMs connected to address lines of the binary counter for memorizing data from the counter, and an EPROM for memorizing data stored in the memory RAMs. When the number of the clock pulse applied to the presettable counter and to the binary counter reaches the preset number, the gate circuits are closed.
    Type: Grant
    Filed: July 24, 1981
    Date of Patent: June 26, 1984
    Inventor: Yoshikazu Kuze
  • Patent number: 4435827
    Abstract: A clock pulse control device for address allocation of a read-only memory in a small size sequence controller in which data stored in the read-only memory are read out sequentially to operate an output relay during a time interval in accordance with the stored data, and the relay controls a load. Clock pulses generated by a frequency-dividing clock pulse generator (30) are applied to presetable down counters (33) and (34) in which the clock pulses are divided down to pulses each having a time period corresponding to the preset value. The divided pulses are applied to a binary counter (29). The outputs of the binary counter (29) are delivered to the read-only memory provided outside from address lines (Q1)-(Q7) via a connector (10) to allocated addresses of the read-only memory sequentially. Predetermined data are stored in the read-only memory in advance and the data of the allocated addresses are delivered to operate the output relay.
    Type: Grant
    Filed: June 26, 1981
    Date of Patent: March 6, 1984
    Inventor: Yoshikazu Kuze
  • Patent number: 4419761
    Abstract: A sequence control system is disclosed which divides data entered onto a time-chart into "1" data (hereinafter referred to as "black dot") and "0" data (hereinafter referred to as "white dot"), and is capable of programming parallel-output data on 16 channels in an inner memory within 2-3 minutes by operation of black dot and white dot key switches and also provides the capability of changing the program in about 10 seconds per line of data. The data is generated by only presetting a cycle-time and putting a start switch.A simplified data storage system is disclosed which places on or off data in the memory in locations which correspond to relative times in the sequence cycle. Thus, the system of the present invention need only address respective locations in memory corresponding to the relative cycle time in order to determine the status of the various outputs.
    Type: Grant
    Filed: June 2, 1980
    Date of Patent: December 6, 1983
    Inventor: Yoshikazu Kuze
  • Patent number: 4363960
    Abstract: Sequence controller for writing data into an EPROM and a film on which the data to be written is recorded. Film (1) is provided by printing clock marks (2) and R/W lines (3) on a transparent body and pasting opaque tapes onto data lines (4) according to a time chart to be written into the EPROM. Accordingly, the resultant data records are visible and it is easy to renew the data.In the sequence controller, a synchronous clock pulse generator and gate devices operate so that the data are photoelectrically read out to be recorded in a RAM (59) in a short period of time as the film is passed along a path defined by a sheet reader (20) after the EPROM (30) has been mounted. Thereafter, the data is written into the EPROM. Thus, the sequence controller can be of a small size and easy to operate.
    Type: Grant
    Filed: October 28, 1980
    Date of Patent: December 14, 1982
    Inventor: Yoshikazu Kuze
  • Patent number: 4196344
    Abstract: A machine controller to be adapted to pressing and other machines for detecting an emergency and stopping a machine. Said machine controller, comprising, a circuit for detecting an emergency and stopping a machine, a counter circuit, a first preset circuit, a second preset circuit, and a controlling circuit of an outer sequencer. A timing pulse generated once per cycle of said machine is counted and displayed. Said machine is stopped when said count coincides with a numeral predetermined by a first preset code switch. A signal is conducted to an outer sequencer when said count has reached a numeral of an inspection lot predetermined by a second preset code switch, thereby said outer sequencer is actuated.
    Type: Grant
    Filed: December 23, 1977
    Date of Patent: April 1, 1980
    Inventor: Yoshikazu Kuze
  • Patent number: 4177377
    Abstract: A sequence control system comprising a transparent program sheet bearing a series of write clock marks and a plurality of data lines and arranged in the longitudinal direction of the sheet; a sheet reader having photo-electric switching means. The program sheet is inserted into the sequence controller from one side until it reaches a positioning index, then the sequence controller being ready for write cycle. While the sheet is pulling out from the other side, the write clock marks generate write clock pulses and then the data will be sequentially written into a memory in synchroniztion with the write clock. After the program sheet has been extracted, a read ready state is automatically established. To read the data, cycle time is determined and a start switch is turned on, then the data being delivered from outputs of the memory in synchronization with the read clock pulse.
    Type: Grant
    Filed: August 7, 1978
    Date of Patent: December 4, 1979
    Inventor: Yoshikazu Kuze
  • Patent number: 4053784
    Abstract: A photo sequence programmer provides the structure that multiple light-emitting elements are disposed inside a rotary transparent cylinder and multiple light-receiving elements are disposed outside the said cylinder. Adhesive opaque tapes are attached on the surface of the transparent cylinder in accordance with a predetermined time chart so that the revolution of the transparent cylinder causes multiple photo-electric conversion switching circuits, which consist of the said light-emitting elements and light-receiving elements, to turn ON and OFF.
    Type: Grant
    Filed: December 5, 1975
    Date of Patent: October 11, 1977
    Inventor: Yoshikazu Kuze