Patents by Inventor Yoshikazu Miyato
Yoshikazu Miyato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100281316Abstract: A semiconductor integrated circuit includes a scan chain configured to serve as a connection path used for testing the semiconductor integrated circuit and connect a plurality of flip-flops and an interleave circuit provided at an output portion of the scan chain. The interleave circuit includes a plurality of branches including different numbers of stages of storage elements, a selector configured to select one of the plurality of branches serving as an input/output branch that performs input of data from the scan chain and output of data from the interleave circuit, and a selector controller configured to execute a process of switching among the plurality of branches to select the input/output branch at every predetermined timing.Type: ApplicationFiled: April 22, 2010Publication date: November 4, 2010Inventors: Yoshikazu MIYATO, Masafumi KUSAKAWA
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Publication number: 20100262830Abstract: Provided is an authentication device which includes a register in which a first-bit or a second-bit different from the first-bit is stored, m first determination units for determining whether input information and authentication information match, and for storing the first-bit in the register if a result of the determination is TRUE and for storing the second-bit in the register if FALSE, (N?m) second determination units for determining whether input information and authentication information do not match, and for storing the first-bit in the register if a result of the determination is TRUE and for storing the second-bit in the register if FALSE, and an authentication determination unit for determining that an authentication is established, in case the first-bit is stored in the register by a determination process by every first determination unit and the second-bit is stored in the register by a determination process by every second determination unit.Type: ApplicationFiled: March 31, 2010Publication date: October 14, 2010Inventors: Masafumi KUSAKAWA, Yoshikazu MIYATO
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Publication number: 20100250936Abstract: There is provided an integrated circuit includes an arithmetic circuit having input/output characteristics determined by element-specific physical characteristics; a storage unit having cipher text obtained by performing encryption processing on predetermined secret information using an output value output from the arithmetic circuit with respect to input of a predetermined value and the predetermined value input into the arithmetic circuit stored therein; and a decryption unit that restores the predetermined secret information by inputting the predetermined value stored in the storage unit into the arithmetic circuit and decrypting the cipher text stored in the storage unit using the output value output from the arithmetic circuit when the predetermined secret information is used.Type: ApplicationFiled: March 16, 2010Publication date: September 30, 2010Inventors: Masafumi Kusakawa, Yoshikazu Miyato
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Patent number: 7659837Abstract: An operation processing apparatus adapted to perform a data conversion on input bits has a logic circuit adapted to perform a data conversion on input bits. The logic circuit includes selectors configured in a hierarchical layer structure and controlled by select signals corresponding to the input bits. Constant values input to selectors located in a bottom layer of the hierarchical structure are selected and transferred toward a top layer from one layer to another. A constant value is finally selected and output from the top layer. The data conversion process is controlled by a control unit such that a pre-charge phase and an evaluation phase are performed alternately. In the pre-charge phase, all input values to the selectors are set to be equal. In the evaluation phase, an output bit for given input bits is produced. The select signals are switched in the pre-charge phase.Type: GrantFiled: November 30, 2007Date of Patent: February 9, 2010Assignee: Sony CorporationInventors: Yoshikazu Miyato, Toru Akishita
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Patent number: 7505398Abstract: A radio relay system (1) comprises a wireless camera (11) and a signal receiving relay station (12). The wireless camera (11) wirelessly transmits signals to the signal receiving relay station (12) by using the OFDM modulation method. The wireless camera (11) and the signal receiving relay station (12) perform energy dispersion at the time of transmission-line-coding/decoding a transport stream. The PRBS seed (initial value) to be used for the energy dispersion can be externally modified and the user can arbitrarily select a value for the seed.Type: GrantFiled: August 20, 2007Date of Patent: March 17, 2009Assignee: Sony CorporationInventors: Yoshikazu Miyato, Yasunari Ikeda
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Patent number: 7403472Abstract: The time required for switch the channel can be remarkably curtailed. When broadcasting signals through a plurality of information channels with an OFDM system, the plurality of information channels are multiplexed in the sense of frequency and collectively subjected to IFFT modulation for connected transmission instead of subjecting the plurality of information channels independently to OFDM modulation for transmission. With this arrangement, the efficiency of exploitation of frequencies is improved. According to the invention, the OFDM frames are synchronized for each information channel for the purpose of connected transmission. Then, the OFDM receiver can switch the information channel for signal reception, maintaining the frame synchronizing signals.Type: GrantFiled: March 25, 2005Date of Patent: July 22, 2008Assignee: Sony CorporationInventors: Takahiro Okada, Yoshikazu Miyato, Yasunari Ikeda, Tamotsu Ikeda
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Publication number: 20080143561Abstract: An operation processing apparatus adapted to perform a data conversion on input bits has a logic circuit adapted to perform a data conversion on input bits. The logic circuit includes selectors configured in a hierarchical layer structure and controlled by select signals corresponding to the input bits. Constant values input to selectors located in a bottom layer of the hierarchical structure are selected and transferred toward a top layer from one layer to another. A constant value is finally selected and output from the top layer. The data conversion process is controlled by a control unit such that a pre-charge phase and an evaluation phase are performed alternately. In the pre-charge phase, all input values to the selectors are set to be equal. In the evaluation phase, an output bit for given input bits is produced. The select signals are switched in the pre-charge phase.Type: ApplicationFiled: November 30, 2007Publication date: June 19, 2008Inventors: Yoshikazu MIYATO, Toru Akishita
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Patent number: 7327669Abstract: A radio relay system (1) comprises a wireless camera (11) and a signal receiving relay station (12). The wireless camera (11) wirelessly transmits signals to the signal receiving relay station (12) by using the OFDM modulation method. The wireless camera (11) and the signal receiving relay station (12) perform energy dispersion at the time of transmission-line-coding/decoding a transport stream. The PRBS seed (initial value) to be used for the energy dispersion can be externally modified and the user can arbitrarily select a value for the seed.Type: GrantFiled: September 7, 2001Date of Patent: February 5, 2008Assignee: Sony CorporationInventors: Yoshikazu Miyato, Yasunari Ikeda
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Publication number: 20070297322Abstract: A radio relay system (1) comprises a wireless camera (11) and a signal receiving relay station (12). The wireless camera (11) wirelessly transmits signals to the signal receiving relay station (12) by using the OFDM modulation method. The wireless camera (11) and the signal receiving relay station (12) perform energy dispersion at the time of transmission-line-coding/decoding a transport stream. The PRBS seed (initial value) to be used for the energy dispersion can be externally modified and the user can arbitrarily select a value for the seed.Type: ApplicationFiled: August 20, 2007Publication date: December 27, 2007Inventors: Yoshikazu Miyato, Yasunari Ikeda
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Patent number: 7075949Abstract: The time required for switch the channel can be remarkably curtailed. When broadcasting signals through a plurality of information channels with an OFDM system, the plurality of information channels are multiplexed in the sense of frequency and collectively subjected to IFFT modulation for connected transmission instead of subjecting the plurality of information channels independently to OFDM modulation for transmission. With this arrangement, the efficiency of exploitation of frequencies is improved. According to the invention, the OFDM frames are synchronized for each information channel for the purpose of connected transmission. Then, the OFDM receiver can switch the information channel for signal reception, maintaining the frame synchronizing signals.Type: GrantFiled: April 12, 2001Date of Patent: July 11, 2006Assignee: Sony CorporationInventors: Takahiro Okada, Yoshikazu Miyato, Yasunari Ikeda, Tamotsu Ikeda
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Publication number: 20050169166Abstract: The time required for switch the channel can be remarkably curtailed. When broadcasting signals through a plurality of information channels with an OFDM system, the plurality of information channels are multiplexed in the sense of frequency and collectively subjected to IFFT modulation for connected transmission instead of subjecting the plurality of information channels independently to OFDM modulation for transmission. With this arrangement, the efficiency of exploitation of frequencies is improved. According to the invention, the OFDM frames are synchronized for each information channel for the purpose of connected transmission. Then, the OFDM receiver can switch the information channel for signal reception, maintaining the frame synchronizing signals.Type: ApplicationFiled: March 25, 2005Publication date: August 4, 2005Inventors: Takahiro Okada, Yoshikazu Miyato, Yasunari Ikeda, Tamotsu Ikeda
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Patent number: 6856590Abstract: The time required for switch the channel can be remarkably curtailed. When broadcasting signals through a plurality of information channels with an OFDM system, the plurality of information channels are multiplexed in the sense of frequency and collectively subjected to IFFT modulation for connected transmission instead of subjecting the plurality of information channels independently to OFDM modulation for transmission. With this arrangement, the efficiency of exploitation of frequencies is improved. According to the invention, the OFDM frames are synchronized for each information channel for the purpose of connected transmission. Then, the OFDM receiver can switch the information channel for signal reception, maintaining the frame synchronizing signals.Type: GrantFiled: April 12, 2001Date of Patent: February 15, 2005Assignee: Sony CorporationInventors: Takahiro Okada, Yoshikazu Miyato, Yasunari Ikeda, Tamotsu Ikeda
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Publication number: 20030031120Abstract: A radio relay system (1) comprises a wireless camera (11) and a signal receiving relay station (12). The wireless camera (11) wirelessly transmits signals to the signal receiving relay station (12) by using the OFDM modulation method. The wireless camera (11) and the signal receiving relay station (12) perform energy dispersion at the time of transmission-line-coding/decoding a transport stream. The PRBS seed (initial value) to be used for the energy dispersion can be externally modified and the user can arbitrarily select a value for the seed.Type: ApplicationFiled: August 27, 2002Publication date: February 13, 2003Inventors: Yoshikazu Miyato, Yasunari Ikeda
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Publication number: 20020034214Abstract: The time required for switch the channel can be remarkably curtailed. When broadcasting signals through a plurality of information channels with an OFDM system, the plurality of information channels are multiplexed in the sense of frequency and collectively subjected to IFFT modulation for connected transmission instead of subjecting the plurality of information channels independently to OFDM modulation for transmission. With this arrangement, the efficiency of exploitation of frequencies is improved. According to the invention, the OFDM frames are synchronized for each information channel for the purpose of connected transmission. Then, the OFDM receiver can switch the information channel for signal reception, maintaining the frame synchronizing signals.Type: ApplicationFiled: April 12, 2001Publication date: March 21, 2002Inventors: Takahiro Okada, Yoshikazu Miyato, Yasunari Ikeda, Tamotsu Ikeda
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Publication number: 20020003773Abstract: The time required for switch the channel can be remarkably curtailed. When broadcasting signals through a plurality of information channels with an OFDM system, the plurality of information channels are multiplexed in the sense of frequency and collectively subjected to IFFT modulation for connected transmission instead of subjecting the plurality of information channels independently to OFDM modulation for transmission. With this arrangement, the efficiency of exploitation of frequencies is improved. According to the invention, the OFDM frames are synchronized for each information channel for the purpose of connected transmission. Then, the OFDM receiver can switch the information channel for signal reception, maintaining the frame synchronizing signals.Type: ApplicationFiled: April 12, 2001Publication date: January 10, 2002Inventors: Takahiro Okada, Yoshikazu Miyato, Yasunari Ikeda, Tamotsu Ikeda
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Patent number: 5506836Abstract: An orthogonal frequency division multiplex (OFDM) demodulation apparatus which accurately reproduces a clock and accurately generates a time window for discrete Fourier transformation (DFT) for stable demodulation of an OFDM modulated signal, wherein a clock reproduction circuit of the OFDM demodulation apparatus includes a Costas computation circuit and processes a signal corresponding to the specific carrier wave signal of a predetermined single wave for each symbol out of the I and Q channel signals obtained by subjecting the OFDM modulated signal to DFT to generate a control voltage using the Costas computation circuit and low pass filters and operates a voltage control oscillator to reproduce a clock signal. The clock signal is divided to produce the time window signals used in the DFT circuit.Type: GrantFiled: July 27, 1994Date of Patent: April 9, 1996Assignee: Sony CorporationInventors: Yasunari Ikeda, Toshihisa Hyakudai, Osamu Ito, Yoshikazu Miyato