Patents by Inventor Yoshikazu Nagashima
Yoshikazu Nagashima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230116216Abstract: A simulation device (800) comprises: a simulation unit (803) which performs simulation of the movements of a plurality of moving bodies on a path; a storage unit (802) which retains an estimated decrement that is an indicator of change over time in the congestion level of the plurality of moving bodies on the path; a first calculation unit (805) which calculates, on the basis of the simulation results, the congestion level of the plurality of moving bodies on the path; and a second calculation unit (806) which calculates the indicator of change over time in the congestion level that was calculated by the first calculation unit. A suitable decrement can be set such that the estimated decrement in congestion level, that is used as a simulation input, and the decrement in the congestion level in the simulation results are equal.Type: ApplicationFiled: November 19, 2020Publication date: April 13, 2023Inventors: Hiroshi YOSHITAKE, Ryota KAMOSHIDA, Yoshikazu NAGASHIMA
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Patent number: 11164274Abstract: An article conveyance system includes: a processor; and a storage device accessed by the processor, in which the processor calculates a conveyance time until a conveyance device conveys a shelf being a target for work of taking out or storing an article to a work place where the work on the shelf is performed and a work time until work scheduled to be performed at the work place is ended; and the processor determines whether or not to add an instruction to cause the conveyance device to convey the shelf to the work place based on a difference between the conveyance time and the work time.Type: GrantFiled: February 6, 2020Date of Patent: November 2, 2021Assignee: HITACHI INDUSTRIAL PRODUCTS, LTD.Inventors: Hiroshi Yoshitake, Ryota Kamoshida, Yoshikazu Nagashima, Masaharu Kondou
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Patent number: 11031694Abstract: In an antenna, the outer conductor is formed of a first linear conductor, the first linear conductor having a length corresponding to one wavelength of a right-handed circularly polarized wave and circularly extended from a first feed point to a second feed point. The inner conductor is disposed inside the outer conductor and formed of a second linear conductor, the second linear conductor being different from the first linear conductor and having a length determined based on one wavelength of a left-handed circularly polarized wave. The inner conductor has a starting point of the second linear conductor connected to the first feed point and has an end point of the second linear conductor kept free from connection at a location inside the outer conductor, and causes current to flow in a direction opposite to the current flow in the outer conductor.Type: GrantFiled: January 30, 2020Date of Patent: June 8, 2021Assignee: YAZAKI CORPORATIONInventors: Eita Itou, Kunihiko Yamada, Yoshikazu Nagashima, Kenji Matsushita, Tatsuo Toba
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Patent number: 10879598Abstract: An antenna unit includes a planar antenna portion, a planar coaxial line portion, and position fixing portions. The planar antenna portion includes planar antennas installed at the inner side of an exterior (for example, a roof panel) of a vehicle, the exterior allowing electric waves to be transmitted therethrough, and a first base portion supporting the planar antennas. The planar coaxial line portion includes second wiring patterns connected to the planar antennas and a second base portion connected to the first base portion and supporting the second wiring patterns. The position fixing portions fix the positions of the planar antenna portion and the planar coaxial line portion onto the exterior.Type: GrantFiled: February 14, 2018Date of Patent: December 29, 2020Assignee: YAZAKI CORPORATIONInventor: Yoshikazu Nagashima
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Publication number: 20200273132Abstract: An article conveyance system includes: a processor; and a storage device accessed by the processor, in which the processor calculates a conveyance time until a conveyance device conveys a shelf being a target for work of taking out or storing an article to a work place where the work on the shelf is performed and a work time until work scheduled to be performed at the work place is ended; and the processor determines whether or not to add an instruction to cause the conveyance device to convey the shelf to the work place based on a difference between the conveyance time and the work time.Type: ApplicationFiled: February 6, 2020Publication date: August 27, 2020Applicant: HITACHI INDUSTRIAL PRODUCTS, LTD.Inventors: Hiroshi YOSHITAKE, Ryota KAMOSHIDA, Yoshikazu NAGASHIMA, Masaharu KONDOU
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Publication number: 20200168994Abstract: In an antenna, the outer conductor is formed of a first linear conductor, the first linear conductor having a length corresponding to one wavelength of a right-handed circularly polarized wave and circularly extended from a first feed point to a second feed point. The inner conductor is disposed inside the outer conductor and formed of a second linear conductor, the second linear conductor being different from the first linear conductor and having a length determined based on one wavelength of a left-handed circularly polarized wave. The inner conductor has a starting point of the second linear conductor connected to the first feed point and has an end point of the second linear conductor kept free from connection at a location inside the outer conductor, and causes current to flow in a direction opposite to the current flow in the outer conductor.Type: ApplicationFiled: January 30, 2020Publication date: May 28, 2020Applicant: Yazaki CorporationInventors: Eita ITOU, Kunihiko YAMADA, Yoshikazu NAGASHIMA, Kenji MATSUSHITA, Tatsuo TOBA
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Publication number: 20180294555Abstract: An antenna unit includes a planar antenna portion, a planar coaxial line portion, and position fixing portions. The planar antenna portion includes planar antennas installed at the inner side of an exterior (for example, a roof panel) of a vehicle, the exterior allowing electric waves to be transmitted therethrough, and a first base portion supporting the planar antennas. The planar coaxial line portion includes second wiring patterns connected to the planar antennas and a second base portion connected to the first base portion and supporting the second wiring patterns. The position fixing portions fix the positions of the planar antenna portion and the planar coaxial line portion onto the exterior.Type: ApplicationFiled: February 14, 2018Publication date: October 11, 2018Applicant: Yazaki CorporationInventor: Yoshikazu NAGASHIMA
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Publication number: 20170317408Abstract: A roof module includes an antenna that is provided in a planar shape along a roof panel on a cabin inner side of the roof panel and transmits and receives electromagnetic waves. The roof panel is formed of a resin material in a planer shape and defines an exterior of a vehicle. The roof module also includes a metal panel that is formed of a metal material in a planar shape and provided along the antenna on the cabin inner side of the antenna. In this manner, the roof module can stabilize electromagnetic environments by the metal panel intentionally provided on the cabin inner side of the antenna in the vehicle the roof panel of which is formed of a non-metal material but a resin material.Type: ApplicationFiled: April 17, 2017Publication date: November 2, 2017Inventors: Ryo Hamada, Akira Norizuki, Kunihiko Yamada, Yoshikazu Nagashima, Goro Nakamura
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Patent number: 9633762Abstract: Provided is a cable enabling to reduce leakage flux and to restrict an increase of high-frequency resistance. A magnetic shield is provided to enable to reduce leakage of magnetic flux to an outside, and two first conductive wires and two second conductive wires having different phases from each other are adjacent to each other and arranged annularly to enable to disperse the magnetic flux, to restrict a proximity effect, and to restrict an increase of high-frequency resistance.Type: GrantFiled: June 19, 2015Date of Patent: April 25, 2017Assignee: Yazaki CorporationInventor: Yoshikazu Nagashima
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Publication number: 20150287499Abstract: Provided is a cable enabling to reduce leakage flux and to restrict an increase of high-frequency resistance. A magnetic shield is provided to enable to reduce leakage of magnetic flux to an outside, and two first conductive wires and two second conductive wires having different phases from each other are adjacent to each other and arranged annularly to enable to disperse the magnetic flux, to restrict a proximity effect, and to restrict an increase of high-frequency resistance.Type: ApplicationFiled: June 19, 2015Publication date: October 8, 2015Applicant: YAZAKI CORPORATIONInventor: Yoshikazu NAGASHIMA
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Publication number: 20140295703Abstract: A structure for fixing the electrical connection section which connects and fixes an electrical connection section of a shielded electric wire to an electrical connection section of a shield housing, includes an electrically insulative annular member which is provided slidably along the outer peripheral surface of the electrical connection section of the shielded electric wire, a conductive fixing member which the outer peripheral surface of the annular member is provided with and is fixed to the shield housing, and a shield member which covers the electric wire and is mechanically and electrically connected to the fixing member, wherein the shield member is bent with the slide of the annular member.Type: ApplicationFiled: June 11, 2014Publication date: October 2, 2014Applicant: YAZAKI CORPORATIONInventor: Yoshikazu NAGASHIMA
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Patent number: 8847677Abstract: According to one embodiment, an amplification circuit can be switched between amplifying and calibration modes. During calibration, a preamplifier amplifies a differential input signal and generates a differential output signal. The amplifier circuit includes an input switch unit which sets a differential input signal as the reference voltage signal of the same voltage level at the time of calibration, a PWM conversion unit which carries out Pulse-Width-Modulation of the differential output signal, and generates a differential PWM signal based on the result of comparing the differential output signal with the reference signal, a calibration unit which generates an offset adjustment signal according to the phase difference of differential PWM signals, and an electric amplifier which carries out electric power amplification of the differential PWM signal and generates the differential final output signal.Type: GrantFiled: September 7, 2012Date of Patent: September 30, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Yoshikazu Nagashima
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Patent number: 8841965Abstract: An amplifier includes a PWM converter that carries out pulse width modulation on differential input signals to generate differential PWM signals by comparing the differential input signals with sawtooth or triangular reference signal, and a power amplifier that carries out power amplification of the differential PWM signals to generate differential output signals. The power amplifier has a driver that drives a load with differential driving signals, a controller that sets a dead time in the differential driving signals to prevent current flow between power supply and ground terminals of the driver circuit, and a pre-delay compensator that generates the differential driving signals based on the differential PWM signals and sends the differential driving signals to the controller. The differential driving signals generated by the pre-delay compensator includes a pulse width for compensating for the dead time that is to be set in the differential driving signals by the controller.Type: GrantFiled: September 7, 2012Date of Patent: September 23, 2014Assignee: Kabushiki Kaisha ToshibaInventor: Yoshikazu Nagashima
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Publication number: 20130187715Abstract: An amplifier includes a PWM converter that carries out pulse width modulation on differential input signals to generate differential PWM signals by comparing the differential input signals with sawtooth or triangular reference signal, and a power amplifier that carries out power amplification of the differential PWM signals to generate differential output signals. The power amplifier has a driver that drives a load with differential driving signals, a controller that sets a dead time in the differential driving signals to prevent current flow between power supply and ground terminals of the driver circuit, and a pre-delay compensator that generates the differential driving signals based on the differential PWM signals and sends the differential driving signals to the controller. The differential driving signals generated by the pre-delay compensator includes a pulse width for compensating for the dead time that is to be set in the differential driving signals by the controller.Type: ApplicationFiled: September 7, 2012Publication date: July 25, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Yoshikazu NAGASHIMA
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Publication number: 20130187710Abstract: According to one embodiment, an amplification circuit can be switched between amplifying and calibration modes. During calibration, a preamplifier amplifies a differential input signal and generates a differential output signal. The amplifier circuit includes an input switch unit which sets a differential input signal as the reference voltage signal of the same voltage level at the time of calibration, a PWM conversion unit which carries out Pulse-Width-Modulation of the differential output signal, and generates a differential PWM signal based on the result of comparing the differential output signal with the reference signal, a calibration unit which generates an offset adjustment signal according to the phase difference of differential PWM signals, and an electric amplifier which carries out electric power amplification of the differential PWM signal and generates the differential final output signal.Type: ApplicationFiled: September 7, 2012Publication date: July 25, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Yoshikazu NAGASHIMA
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Patent number: 7830295Abstract: In an A/D converter, three capacitors are connected to a comparator. The A/D converter also includes three switching circuits that each input a first reference voltage, a second reference voltage, and a third reference voltage in the three capacitors. A control circuit selects at least two of the three switching circuits during a charging period of stray capacitance of each of the capacitors. The control circuit turns on one of the switching devices in the selected switching circuits simultaneously, and during a comparing period by the comparator, selects one of the three capacitors for each comparison, and selects another capacitor in the next comparison.Type: GrantFiled: April 21, 2009Date of Patent: November 9, 2010Assignee: Kabushiki Kaisha ToshibaInventors: Shinichi Ikeda, Hirotomo Ishii, Yoshikazu Nagashima
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Publication number: 20100001891Abstract: In an A/D converter, three capacitors are connected to a comparator. The A/D converter also includes three switching circuits that each input a first reference voltage, a second reference voltage, and a third reference voltage in the three capacitors. A control circuit selects at least two of the three switching circuits during a charging period of stray capacitance of each of the capacitors. The control circuit turns on one of the switching devices in the selected switching circuits simultaneously, and during a comparing period by the comparator, selects one of the three capacitors for each comparison, and selects another capacitor in the next comparison.Type: ApplicationFiled: April 21, 2009Publication date: January 7, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shinichi IKEDA, Hirotomo ISHII, Yoshikazu NAGASHIMA
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Publication number: 20090226007Abstract: A mute circuit has a resistor net configured to include a plurality of resistors connected in cascade between two reference voltage terminals, the resistor net being capable of outputting one of divided voltages from between the adjacent resistors, a selecting circuit configured to control selection of the divided voltage outputted from the resistor net based on logic of a selecting signal, a signal propagation determining circuit configured to monitor a voltage level of the divided voltage selected by the selecting circuit using an alternating test signal, and determine whether a signal indicating the monitored result propagates or not at the same cycle as that of the test signal, a memory circuit configured to store data corresponding to an output signal of the signal propagation determining circuit in association with the selecting signal, a first switching circuit configured to switch whether a DC blocking capacitor is charged or not according to the divided voltage outputted from between specific resistoType: ApplicationFiled: March 10, 2009Publication date: September 10, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Yoshikazu Nagashima
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Patent number: 6594129Abstract: In a semiconductor relay system for supply a power source to a lamp load under the on/off control by a microcomputer using a semiconductor relay, a method of cutting off a circuit under an overcurrent, a first prescribed value is which is a current value higher than a rated load current for the load and a maximum current value supplied to the lamp load, and a second prescribed value is set which is a current value between said first prescribed value and said rated current value; the current value flowing through the lamp load is sampled at predetermined time intervals and comparing the current value thus sampled with the second prescribed value; and when a higher current than said first prescribed value flows through the lamp load, the current supplied to the lamp load is controlled within a prescribed range between said first prescribed value and said second prescribed value, and when the sampled current value higher that said second prescribed value is counted by a prescribed number of times, the sampled cuType: GrantFiled: September 22, 2000Date of Patent: July 15, 2003Assignee: Yazaki CorporationInventors: Akira Baba, Yoshikazu Nagashima, Kazuto Sugiyama, Yoshihiko Mine
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Patent number: 6304208Abstract: There is provided a successive approximation A/D converter circuit for correcting an error generated in an A/D conversion code due to parasitic resistance of a D/A conversion circuit, on a semiconductor chip. A switch for performing a switching operation between a sampling period and a comparing period, and first and second level shift circuits constituted of a plurality of condensers, are provided between a D/A conversion circuit and a voltage comparing circuit. The first level shift circuit applies a voltage for correcting a voltage drop due to the parasitic resistance of the D/A conversion circuit to the plurality of condensers to evenly correct the errors generated in the D/A conversion voltage independently of the D/A conversion code.Type: GrantFiled: January 19, 2000Date of Patent: October 16, 2001Assignee: Kabushiki Kaisha ToshibaInventor: Yoshikazu Nagashima