Patents by Inventor Yoshikazu Sakano

Yoshikazu Sakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070227100
    Abstract: A wrapping device for manually operating to package products, particularly of cubic or cuboidal shape, includes a table, an upper side folder, a first heater, second heaters, first adjusters, second adjusters, and side interfolders. A wrapper such as a film is extended on the table and a product is placed on a recess of the table. Then, the film is folded toward the top face of the product, to which the folder is moved to fuse it by the first heater. Then, the first adjusters and the second adjusters are moved, and the table is moved downward to interfold, and fuse the film by the second heaters.
    Type: Application
    Filed: May 29, 2007
    Publication date: October 4, 2007
    Inventors: Tomoaki Ito, Kazushige Komori, Yoshikazu Sakano, Toshikazu Takehara
  • Publication number: 20060053751
    Abstract: A device for wrapping an object of substantially cuboid shape with predetermined width, length and thickness having top and bottom faces opposed in a thickness direction, front and rear end faces opposed in a longitudinal direction, and right and left side faces opposed in a width direction, in a wrapping material fusible by heating. The device has a mounting table, a movable folder, and a front face heater to heat the wrapping material to a fusing temperature. The mounting table has a front bottom step. The movable folder has a front top step movable toward the mounting table. The front top step is adapted to face the front bottom step in the thickness direction when the movable folder is moved to the mounting table. The front face heater is movable between the front bottom step and the front top step to fuse the wrapping material of the front end face.
    Type: Application
    Filed: October 7, 2004
    Publication date: March 16, 2006
    Inventors: Tomoaki Ito, Kazushige Komori, Yoshikazu Sakano, Toshikazu Takehara
  • Patent number: 6521538
    Abstract: In a method for manufacturing a semiconductor device, first, a trench is formed on a semiconductor substrate by anisotropic etching, and a reaction product is produced and deposited on the inner wall of the trench during the anisotropic etching. Then, isotropic etching is performed to round a corner of a bottom portion of the trench without removing the reaction product. The isotropic etching can round the corner of the trench without etching the side wall of the trench that is covered by the reaction product.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: February 18, 2003
    Assignee: Denso Corporation
    Inventors: Hajime Soga, Kenji Kondo, Eiji Ishikawa, Yoshikazu Sakano, Mikimasa Suzuki
  • Publication number: 20010023960
    Abstract: In a method for manufacturing a semiconductor device, first, a trench is formed on a semiconductor substrate by anisotropic etching, and a reaction product is produced and deposited on the inner wall of the trench during the anisotropic etching. Then, isotropic etching is performed to round a corner of a bottom portion of the trench without removing the reaction product. The isotropic etching can round the corner of the trench without etching the side wall of the trench that is covered by the reaction product.
    Type: Application
    Filed: February 23, 2001
    Publication date: September 27, 2001
    Inventors: Hajime Soga, Kenji Kondo, Eiji Ishikawa, Yoshikazu Sakano, Mikimasa Suzuki
  • Patent number: 6090718
    Abstract: After performing an etching process with respect to one substrate, the substrate is taken out from an etching chamber. Then, a dummy substrate is disposed in the etching chamber and a cleaning process is performed. The cleaning process includes a cleaning step for etching reaction products produced during the etching process to be removed, a seasoning step for adjusting the atmosphere within the etching chamber and the temperature of the substrate, and a purge step for removing suspended foreign materials without generating plasma. By performing the cleaning process, the successive etching process can be performed without generating any black silicon on the substrate, thereby attaining a high production yield.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: July 18, 2000
    Assignee: Denso Corporation
    Inventors: Hajime Soga, Kenji Kondo, Eiji Ishikawa, Yoshikazu Sakano, Yuji Ichikawa
  • Patent number: 5871659
    Abstract: A process for dry etching a silicon substrate, in which a mask exposing a region of the surface of the silicon substrate is formed, and the exposed region is dry etched. The dry etching is performed with a gas mixture including chlorine or a chlorine-containing gas, an oxygen-containing gas, and a fluorine-containing gas in which a ratio of a flow rate of oxygen gas to a flow rate of chlorine gas, O.sub.2 /Cl.sub.2, is selected to be from 0.6 to 3. The gas mixture may also contain a fluorine-containing gas and helium. Preferably, the gas mixture excludes carbon-containing gases. The dry etching process allows for an increased etch rate, as well as a high etch selectivity compared to that of SiO.sub.2 gas. The trench formed in the substrate by this process can be made of a larger depth with high reproducibility and good configuration. The sidewall profile angle of the trench is maintained slightly tapered, with a sidewall profile angle of approximately 90 degrees.
    Type: Grant
    Filed: June 18, 1996
    Date of Patent: February 16, 1999
    Assignee: Nippondenso Co., Ltd.
    Inventors: Yoshikazu Sakano, Kenji Kondo, Hajime Soga, Yasuo Ishihara, Yoshifumi Okabe
  • Patent number: 5522966
    Abstract: A process for forming trenches on a surface of a semiconductor substrate by dry etching using a gas mixture. The gas mixture comprises; (1) an etchant gas comprising at least bromine which etches the semiconductor surface to form trenches, (2) a cleaning gas comprising a halogen which evaporates residue formed by the etching, and (3) a reactive gas, e.g. N.sub.2, capable of reacting with material formed during the etching and capable of controlling the inclination of the trenches.
    Type: Grant
    Filed: November 17, 1993
    Date of Patent: June 4, 1996
    Assignee: Nippondenso Co., Ltd.
    Inventors: Atsushi Komura, Yoshikazu Sakano, Kenji Kondo, Keiichi Kon, Tetsuhiko Sanbei, Shoji Miura
  • Patent number: 5423941
    Abstract: A process for forming deep trenches on a surface of a semiconductor substrate by forming a mask on the surface of the semiconductor, which prescribes the position of the trenches; and then dry etching the semiconductor surface using a gas mixture comprising (1) an etchant, bromine containing, gas which etches the semiconductor surface to form trenches, (2) a cleaning, halogen containing, gas which evaporates the residue formed by the etching; and (3) a reactive gas capable of reacting with material formed during the etching and capable of decreasing the wastage of the mask by the etchant gas.
    Type: Grant
    Filed: November 17, 1993
    Date of Patent: June 13, 1995
    Assignee: Nippondenso Co., Ltd.
    Inventors: Atsushi Komura, Yoshikazu Sakano, Kenji Kondo, Keiichi Kon, Tetsuhiko Sanbei, Shoji Miura