Abstract: The data carrier has a communication protocol storage unit storing a communication protocol for communicating with an external communication device, an RF analogue receiver receiving an interrogation signal from the external communication device as an RF signal, a contact communication end terminal unit performing contact communication with the external communication device, a communication command controller controlling a command used in an RF communication protocol performed via said RF analogue receiver or a contact-type serial communication protocol performed via said contact communication end terminal unit, and a connection selector selectively connecting one of said RF analogue receiver and said contact communication end terminal unit with said communication command controller.

Abstract: A region to store authentication commands to perform authentication between a data carrier and a reader/writer device is divided into at least three areas, and as for the three areas, a first authentication command is stored in a first area, a second authentication command is stored in a second area, and a third authentication command is stored in a third area, and security levels can be selected depending on a command of an inquiry signal (41) transmitted from a reader/writer device (10), and thereby selection of the security level suitable for circumstances can be realized by a simple constitution.

Abstract: Both RF communication and contact serial communication can be performed with the use of: communication protocol storage unit for storing a communication protocol for performing communication with an external communication apparatus; a coil terminal section provided with two coil terminals for performing communication with the external communication apparatus with an RF signal; a contact communication terminal section provided with a first communication terminal, a second communication terminal, a power supply voltage terminal and a ground terminal as contact communication terminals for performing contact communication with the external communication apparatus; and connection control unit for causing the power supply voltage terminal and a power supply of an internal switch circuit to be in contact or non-contact with each other depending on the level of voltage applied to the first and second communication terminals.

Abstract: A region to store authentication commands to perform authentication between a data carrier and a reader/writer device is divided into at least three areas, and as for the three areas, a first authentication command is stored in a first area, a second authentication command is stored in a second area, and a third authentication command is stored in a third area, and security levels can be selected depending on a command of an inquiry signal (41) transmitted from a reader/writer device (10), and thereby selection of the security level suitable for circumstances can be realized by a simple constitution.

Abstract: The data carrier has a communication protocol storage unit storing a communication protocol for communicating with an external communication device, an RF analogue receiver receiving an interrogation signal from the external communication device as an RF signal, a contact communication end terminal unit performing contact communication with the external communication device, a communication command controller controlling a command used in an RF communication protocol performed via said RF analogue receiver or a contact-type serial communication protocol performed via said contact communication end terminal unit, and a connection selector selectively connecting one of said RF analogue receiver and said contact communication end terminal unit with said communication command controller.

Abstract: Command control is performed by the same command control unit even in the communication in which either an RF analog section or a contact communication terminal section is used, and thereby, both of RF communication and contact-type serial communication can be performed by using a predetermined communication protocol stored in a storage unit in common, and both of the RF communication and the contact-type serial communication can be performed by using the single communication protocol, resulting that a circuit configuration of a data carrier capable of performing the RF communication and the contact-type serial communication can be simplified, and memory capacity necessary for storing the communication protocol can be reduced.

Abstract: Both of a proximity communication command in order to perform proximity communication with a reader/writer device and a vicinity communication command in order to perform vicinity communication with the reader/writer device are held in a command holding unit, and in the case when being inquired from the reader/writer device by using the proximity communication command, a response signal is generated by using the proximity communication command, and in the case when being inquired from the reader/writer device by using the vicinity communication command, the response signal is generated by using the vicinity communication command, resulting that both of the proximity communication and the vicinity communication can be performed depending on a usage mode.

Abstract: Both RF communication and contact serial communication can be performed with the use of: communication protocol storage unit for storing a communication protocol for performing communication with an external communication apparatus; a coil terminal section provided with two coil terminals for performing communication with the external communication apparatus with an RF signal; a contact communication terminal section provided with a first communication terminal, a second communication terminal, a power supply voltage terminal and a ground terminal as contact communication terminals for performing contact communication with the external communication apparatus; and connection control unit for causing the power supply voltage terminal and the power supply of the internal circuit to be in contact or non-contact with each other depending on the level of voltage applied to the first and second communication terminals.

Abstract: The semiconductor booster circuit includes a plurality of stages, each of which has a MOS transistor and two capacitors. The MOS transistor, having a drain, a source and a gate, is formed in a well of a substrate portion. One capacitor has a terminal connected to the drain of the MOS transistor, while the other capacitor has a terminal connected to the gate of the MOS transistor. A first clock signal generating means generate a first clock signal via another terminal of one capacitor. A second clock signal generating mean s generate a second clock signal, with a larger amplitude than a power supply voltage, via another terminal of another capacitor. The plurality of stages are cascaded together, and in each of the stages the source of the MOS transistor is electrically connected to the well in which the transistor is formed, while the wells are electrically insulated from each other.

Abstract: A semiconductor booster circuit includes: a plurality of stages, each having a first MOS transistor and a first capacitor having one terminal connected to a drain terminal of the first MOS transistor, the stages being connected in series by connecting the first MOS transistors of the stages in cascade; and at least one of a first arrangement wherein a source terminal of the first MOS transistor of each of the stages is electrically connected to its substrate, and the substrates of the first MOS transistors in the plurality of stages are electrically insulated from one another, and a second arrangement wherein one terminal of a second capacitor is connected to a gate terminal of the first MOS transistor of each of the stages, and a first clock signal generating unit for inputting a first clock signal to the other terminal of the first capacitor in each stage and a second clock signal generating unit for inputting a second clock signal having a larger amplitude than a power supply voltage (Vdd) to the other ter

Abstract: A semiconductor booster circuit includes: a plurality of stages, each having a first MOS transistor and a first capacitor having one terminal connected to a drain terminal of the first MOS transistor, the stages being connected in series by connecting the first MOS transistors of the stages in cascade; and at least one of a first arrangement wherein a source terminal of the first MOS transistor of each of the stages is electrically connected to its substrate, and the substrates of the first MOS transistors in the plurality of stages are electrically insulated from one another, and a second arrangement wherein one terminal of a second capacitor is connected to a gate terminal of the first MOS transistor of each of the stages, and a first clock signal generating unit for inputting a first clock signal to the other terminal of the first capacitor in each stage and a second clock signal generating unit for inputting a second clock signal having a larger amplitude than a power supply voltage (Vdd) to the other ter

Abstract: The electrically rewritable nonvolatile semiconductor memory device includes a plurality of memory cells arranged in rows and columns, a decoder circuit for selecting at least one of the plurality of memory cells, a writing circuit for writing data in the selected memory cell through the decoder circuit, a reading circuit for reading the data from the selected memory cell, a detecting circuit for detecting a change of the threshold voltage of each of the non-selected memory cells, which change is caused by a voltage applied to the non-selected memory cell when writing the data in the selected memory cell, and a restoring circuit for restoring the threshold voltage of the non-selected memory cell a value equal to or near to its original value on the basis of the result of the above detection.

Abstract: A method of writing or reading at least three different data in each memory cell, in a non-volatile semiconductor memory device having a plurality of memory cells, each memory cell having floating gate for setting a given threshold voltage in the memory cell. In addition, a non-volatile semiconductor memory device capable of checking if the data stored in the selected memory cell is correct by using one of at least two binary bits of the data as a parity bit, and a method of writing or reading data in or from that memory device.

Abstract: A non-volatile semiconductor memory device capable of electrical programming including a plurality of memory cells, means for selecting at least one memory cell from the plurality of memory cells, mode setting means for setting one of a first read mode in which data written in the selected memory cell is read and a second read mode for detecting a change of the threshold voltage level of the selected memory cell, first comparing means for comparing a voltage signal read from the selected memory cell with at least a predetermined single first reference voltage level when the first read mode is set, first output means for producing a signal indicative of data written in the selected memory cell on the basis of the comparison in the first comparing means, second comparing means for comparing the cell voltage signal with at least a predetermined single second reference voltage level different from the first reference voltage level when the second read mode is set, and second output means for producing a signal in