Abstract: A mark is formed over the surface of a silicon substrate. The mark includes a silicon oxide film, in which a plurality of rectangular groove patterns are concentrically arranged, and a silicon nitride film formed in the groove patterns. A P-type epitaxial layer is formed over the surface of the silicon substrate. Then, a photoresist pattern is formed. In the photoresist pattern, a rectangular opening pattern is formed in a mark region. Optical superposition inspection is performed for the base of the photoresist pattern.

Abstract: A mark is formed over the surface of a silicon substrate. The mark includes a silicon oxide film, in which a plurality of rectangular groove patterns are concentrically arranged, and a silicon nitride film formed in the groove patterns. A P-type epitaxial layer is formed over the surface of the silicon substrate. Then, a photoresist pattern is formed. In the photoresist pattern, a rectangular opening pattern is formed in a mark region. Optical superposition inspection is performed for the base of the photoresist pattern.

Abstract: A semiconductor device, in which an increase in the size of a product can be suppressed and a withstand voltage between wiring layers can be improved, and a manufacturing method thereof are provided. A discontinued part, in which the interface between an interlayer insulating film and a passivation film is discontinued, is formed between a first wiring layer and a second wiring layer that are adjacent to each other with a space therebetween. Both the interlayer insulating film and the passivation film face an air gap in the discontinued part.

Abstract: A semiconductor device, in which an increase in the size of a product can be suppressed and a withstand voltage between wiring layers can be improved, and a manufacturing method thereof are provided. A discontinued part, in which the interface between an interlayer insulating film and a passivation film is discontinued, is formed between a first wiring layer and a second wiring layer that are adjacent to each other with a space therebetween. Both the interlayer insulating film and the passivation film face an air gap in the discontinued part.

Abstract: A mark is formed over the surface of a silicon substrate. The mark includes a silicon oxide film, in which a plurality of rectangular groove patterns are concentrically arranged, and a silicon nitride film formed in the groove patterns. A P-type epitaxial layer is formed over the surface of the silicon substrate. Then, a photoresist pattern is formed. In the photoresist pattern, a rectangular opening pattern is formed in a mark region. Optical superposition inspection is performed for the base of the photoresist pattern.

Abstract: A semiconductor device, in which an increase in the size of a product can be suppressed and a withstand voltage between wiring layers can be improved, and a manufacturing method thereof are provided. A discontinued part, in which the interface between an interlayer insulating film and a passivation film is discontinued, is formed between a first wiring layer and a second wiring layer that are adjacent to each other with a space therebetween. Both the interlayer insulating film and the passivation film face an air gap in the discontinued part.

Abstract: Low-voltage side wirings LWA and LWB extend in X-direction, respectively, while meandering along a main surface of a semiconductor substrate SUB. A high-voltage side wiring HAW is opposed to the meandering low-voltage side wiring LWA, and a high-voltage side wiring HWB is opposed to the meandering low-voltage side wirings LWB. The high-voltage side wirings HWA and HWB include: X-direction extending parts XA and XB extending in X-direction; and a plurality of Y-direction extending parts YA and YB extending, respectively, in Y-direction. Toward a section of the low-voltage side wiring LWA being away from the X-direction extending part XA, the Y-direction extending part YA has entered. Also, toward a section of the low-voltage side wiring LWB being away from the X-direction extending part XB, the Y-direction extending part YB has entered.

Abstract: A semiconductor device in which an electrode is not allowed to easily deform even when a heat treatment is performed on a material forming the electrode during a damascene process for forming a stacked capacitor, and a manufacturing method thereof are provided. A conductive film 5 made of the same material as that of a capacitor lower electrode 6 is formed so as to be adhered to a top face of a conductive film 4 by a heat treatment. If the lower electrode 6 is made of a noble metal such as ruthenium, for example, the conductive film 5 is made of the same noble metal. Because of use of the same material for forming the conductive film 5 and the lower electrode 6, connection between the conductive film 5 and the lower electrode 6 is strengthened. Accordingly, it is easy to maintain connection between the conductive film 5 and the lower electrode 6 during a heat treatment on the lower electrode 6, so that the lower electrode is not likely to deform.

Abstract: A method for manufacturing a capacitor is provided which can form a lower electrode having a high aspect ratio without suffering deterioration of the capacitor electric characteristics even when a platinum-group metal is adopted as the material of the lower electrode and a metal oxide having a high dielectric constant is adopted as the material of the dielectric film. Holes (8) that reach contact plugs (2) are formed in an insulating film (7). Then a dielectric film (9) is formed on the surfaces of the holes (8). Next the dielectric film (9) on the bottoms of the holes (8) are etched away to form holes (18) reaching the contact plugs (2). Lower electrodes (11) are then formed to fill the holes (8) and (18).

Abstract: A conductive layer (5) including polycrystalline silicon is provided on a second interlayer insulating film (3). An opening (OP1) is defined in the conductive layer (5). Thereafter utilizing electroplating, a conductive material (4a) serving as a capacitor lower electrode is formed in the opening (OP1). The conductive layer (5) holds an insulating layer (6) provided thereon, thus avoiding the conductive material (4a) from being deposited over the conductive layer (5). Therefore, the conductive material can be formed with reliability in the opening. Further, it is possible to omit the steps of forming a redundant film and removing the same.

Abstract: A method for manufacturing a capacitor is provided which can form a lower electrode having a high aspect ratio without suffering deterioration of the capacitor electric characteristics even when a platinum-group metal is adopted as the material of the lower electrode and a metal oxide having a high dielectric constant is adopted as the material of the dielectric film. Holes (8) that reach contact plugs (2) are formed in an insulating film (7). Then a dielectric film (9) is formed on the surfaces of the holes (8). Next the dielectric film (9) on the bottoms of the holes (8) are etched away to form holes (18) reaching the contact plugs (2). Lower electrodes (11) are then formed to fill the holes (8) and (18).

Abstract: A semiconductor device in which an electrode is not allowed to easily deform even when a heat treatment is performed on a material forming the electrode during a damascene process for forming a stacked capacitor, and a manufacturing method thereof are provided. A conductive film 5 made of the same material as that of a capacitor lower electrode 6 is formed so as to be adhered to a top face of a conductive film 4 by a heat treatment. If the lower electrode 6 is made of a noble metal such as ruthenium, for example, the conductive film 5 is made of the same noble metal. Because of use of the same material for forming the conductive film 5 and the lower electrode 6, connection between the conductive film 5 and the lower electrode 6 is strengthened. Accordingly, it is easy to maintain connection between the conductive film 5 and the lower electrode 6 during a heat treatment on the lower electrode 6, so that the lower electrode is not likely to deform.

Abstract: A conductive layer (5) including polycrystalline silicon is provided on a second interlayer insulating film (3). An opening (OP1) is defined in the conductive layer (5). Thereafter utilizing electroplating, a conductive material (4a) serving as a capacitor lower electrode is formed in the opening (OP1). The conductive layer (5) holds an insulating layer (6) provided thereon, thus avoiding the conductive material (4a) from being deposited over the conductive layer (5). Therefore, the conductive material can be formed with reliability in the opening. Further, it is possible to omit the steps of forming a redundant film and removing the same.

Abstract: A semiconductor device including a semiconductor substrate having a main surface, an insulating layer formed on the main surface of the semiconductor substrate, and lower electrode film embedded in the insulating layer. A dielectric film embedded in the insulating layer covers the lower electrode film. An upper electrode film is embedded in the insulating layer and is opposed to the lower electrode film through the dielectric film. A conductor plug electrically connects the lower electrode film and the semiconductor substrate with each other through a lower contact hole selectively formed in the insulating layer. A conductor layer is embedded in the insulating layer and is electrically connected to the upper electrode film on a first portion defining a part of the upper surface of the conductor layer.

Abstract: A semiconductor device having a stacked capacitor is provided. A dielectric film (81) formed of BST by a sputtering process is entirely provided to cover upper part of a plurality of storage node electrodes (SN2). A dielectric film (82) formed of BST by a CVD process is entirely provided to cover the dielectric film (81). The dielectric films (81, 82) constitute a dielectric layer (80). A conductive layer made of platinum covers an entire surface of the dielectric film (82) to constitute a counter electrode (9) to the storage node electrodes. The dielectric layer has good step coverage, reduced dependence upon its underlying layer, and good crystallinity.

Abstract: An upper electrode film (9) is electrically connected to a part of the upper surface of a conductor layer (14) through a side wall (10). A wire (20) is connected to the conductor layer (14) through an upper contact hole (33) opening in another part of the upper surface of the conductor layer (14). Thus, over-etching is prevented in formation of the contact hole for connecting the wire to the capacitor upper electrode film.

Abstract: Provided are a method of manufacturing a stacked capacitor with which it is easy to fabricate even when a noble metal such as platinum is used for a lower electrode, and a stacked capacitor which can suppress a chemical reaction between a dielectric film or a sidewall lower electrode and a conductive plug. The method comprises the steps of: forming an insulating film (4); forming a film to be etched on the insulating film (4); forming a pattern for a lower electrode core (5A) which extends through the film to be etched and the insulating film (4) and extends to part of a conductive plug (3); burying a material for the lower electrode core (5A) into the pattern; burying a top insulating film (6A) and removing the film to be etched; depositing a material for a sidewall lower electrode (7A) and performing an etch back; and forming a dielectric film (8) and upper electrode (9).

Abstract: A silicon oxide film in a cylindrical shape which is high in workability as compared with other conductive materials is formed to cover an entire surface of a barrier metal film as a lower electrode of a capacitor. In addition, a sidewall platinum film is formed on side surfaces of silicon oxide film and barrier metal film in the cylindrical shape. Thus, a DRAM having a smaller capacitor with workability of the lower electrode increased and a manufacturing method thereof is provided.

Abstract: A conductive layer connecting structure has a barrier layer preventing mutual diffusion between silicon and platinum group elements even when they are heated to a high temperature. The conductive layer connecting structure includes a plug containing doped polycrystalline silicon, a barrier layer formed on the plug and containing titanium, silicon and nitrogen, and a lower electrode layer formed on the barrier layer and containing platinum.

Abstract: A semiconductor device having a capacitor comprising an insulating layer 2 formed on a semiconductor substrate 1, a contact hole 9 disposed at a predetermined position on the insulating layer 2, a lower electrode 8 extending to the insulating layer 2 and electrically connected to the semiconductor substrate 1 through the contact hole, a dielectric film 10 formed to cover a surface of the lower electrode 8, an upper electrode 11 disposed on the dielectric film 10 so as to be opposite to the surface of the lower electrode 8 interposing the dielectric film, and a protection film 12 disposed adjacent to an end of a side surface of the lower electrode 8 for preventing the insulating layer 7 from being in contact with the dielectric film 10 at around the end, wherein the protection film is made of a material having a lattice constant same as or similar to that of the dielectric film 10, whereby it is possible to prevent deterioration of crystallization of the dielectric film to prevent a leak current in the capacit