Patents by Inventor Yoshiki Ashihara

Yoshiki Ashihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • MICRO-HOTPLATE AND MEMS GAS SENSOR
    Publication number: 20210262967
    Abstract: A micro-hotplate comprises a Si substrate having a cavity and a support layer over the cavity; at least an electrode; and a heater, both provided on the support layer. The electrode surrounds the heater and the heater is disposed inside the electrode. The power efficiency of the micro-hotplate is improved.
    Type: Application
    Filed: February 22, 2019
    Publication date: August 26, 2021
    Inventors: Yoshitaka TATARA, Masahito HONDA, Hiroaki NAGAI, Yoshiki ASHIHARA, Kuniyuki IZAWA, Masakazu SAI, Kenichi YOSHIOKA
  • Method for bonding wafers and structure of bonding part
    Patent number: 9136232
    Abstract: A method for bonding wafers includes forming a first bonding part on a surface of a first wafer by stacking a diffusion preventing layer formed of a material having low wettability with AuSn above the first wafer and forming a bonding layer on a surface of the diffusion preventing layer such that the bonding layer stays back of an edge of the diffusion preventing layer, forming a second bonding part on a surface of a second wafer, and bonding the first bonding part and the second bonding part by eutectic bonding with an AuSn solder under a condition that the first wafer and the second wafer are opposed to each other.
    Type: Grant
    Filed: September 27, 2012
    Date of Patent: September 15, 2015
    Assignee: OMRON Corporation
    Inventors: Takeshi Fujiwara, Toshiaki Okuno, Katsuyuki Inoue, Junya Yamamoto, Kenichi Hinuma, Yoshiki Ashihara, Takaaki Miyaji
  • METHOD FOR BONDING WAFERS AND STRUCTURE OF BONDING PART
    Publication number: 20140339710
    Abstract: A method for bonding wafers includes forming a first bonding part on a surface of a first wafer by stacking a diffusion preventing layer formed of a material having low wettability with AuSn above the first wafer and forming a bonding layer on a surface of the diffusion preventing layer such that the bonding layer stays back of an edge of the diffusion preventing layer, forming a second bonding part on a surface of a second wafer, and bonding the first bonding part and the second bonding part by eutectic bonding with an AuSn solder under a condition that the first wafer and the second wafer are opposed to each other.
    Type: Application
    Filed: September 27, 2012
    Publication date: November 20, 2014
    Inventors: Takeshi Fujiwara, Toshiaki Okuno, Katsuyuki Inoue, Junya Yamamoto, Kenichi Hinuma, Yoshiki Ashihara, Takaaki Miyaji
  • ELECTRODE STRUCTURE AND MICRODEVICE PACKAGE PROVIDED THEREWITH
    Publication number: 20110221056
    Abstract: An electrode structure has a Cu electrode that provided in a surface of a substrate, a diffusion preventing film that is made of a material in which a diffusion coefficient of Sn is equal to or lower than 3×10?23 cm2/sec, the whole Cu electrode being covered with the diffusion preventing film, and a solder layer that is provided above the diffusion preventing film, the solder layer being made of Au—Sn solder.
    Type: Application
    Filed: December 22, 2010
    Publication date: September 15, 2011
    Applicant: OMRON CORPORATION
    Inventors: Takaaki Miyaji, Akihiko Sano, Tadashi Inoue, Toshiaki Okuno, Yoshiki Hada, Sayaka Doi, Yoshiki Ashihara