Abstract: A disk reproducing device comprising: clock signal extracting means for extracting a regenerative clock signal from a reproduced signal; synchronization detecting means for detecting a synchronizing signal from the reproduced signal; extracted clock signal verification means for verifying that the regenerative clock signal is correctly extracted; signal processing means for performing variable linear velocity reproduction; target reproducing speed setting means for setting a target reproducing speed; reproducing speed verification means for verifying that a reproducing speed reaches the target reproducing speed; and signal processing start command generating means for outputting a signal processing start command referring outputs of said extracted clock signal verification means and said reproducing speed verification means.

Abstract: A reproduced image transmission apparatus which can display reversely reproduced images normally even when the transfer order of asynchronous transfer and isochronous transfer is not ensured on IEEE1394, in cases where an apparatus for generating the reversely reproduced images and an apparatus for decoding the reversely reproducing images are connected with each other via an IEEE1394 network. An MPEG transport stream processing means 15 embeds control signal for controlling decoding in an MPEG picture, and transmits the signal together with the MPEG picture through the IEEE1394 network in the isochronous transfer mode, whereby the synchronization between the MPEG picture and its control signal is surely obtained, thereby to generate reversely reproduced images according to MPEG using P and B pictures.

Abstract: A disk reproducing device comprising: clock signal extracting means for extracting a regenerative clock signal from a reproduced signal; synchronization detecting means for detecting a synchronizing signal from the reproduced signal; extracted clock signal verification means for verifying that the regenerative clock signal is correctly extracted; signal processing means for performing variable linear velocity reproduction; target reproducing speed setting means for setting a target reproducing speed; reproducing speed verification means for verifying that a reproducing speed reaches the target reproducing speed; and signal processing start command generating means for outputting a signal processing start command referring outputs of said extracted clock signal verification means and said reproducing speed verification means.

Abstract: A disk reproducing device comprising: clock signal extracting means for extracting a regenerative clock signal from a reproduced signal; synchronization detecting means for detecting a synchronizing signal from the reproduced signal; extracted clock signal verification means for verifying that the regenerative clock signal is correctly extracted; signal processing means for performing variable linear velocity reproduction; target reproducing speed setting means for setting a target reproducing speed; reproducing speed verification means for verifying that a reproducing speed reaches the target reproducing speed; and signal processing start command generating means for outputting a signal processing start command referring outputs of said extracted clock signal verification means and said reproducing speed verification means.

Abstract: In the data processing apparatus and file management method therefor of the present invention, when each piece of data in one of plural blocks is recorded as a data portion on a disk medium, continuous ID numbers are assigned to the individual continuous blocks, each of the assigned ID numbers is stored in the ID portion of sub-code portion, address information indicating the recording position of the head of at least the next block is stored in the link portion of the sub-code portion, and the sub-code portion is recorded together with the data portion of the block on the disk medium.

Abstract: An advertisement supplying method, characterized in that an area for recording advertisement data is crated in a large-capacity recording medium, advertisement data which are to be reproduced when an audience watch a program are recorded in said area in advance, and said large-capacity recording medium is thereafter provided.

Abstract: A virtual RAM read address generating circuit (41) generates a virtual address on the basis of an output signal of a crystal oscillation circuit (36). A phase comparison circuit (39) which performs phase comparison with a write address, and a spindle control circuit (3) which controls rotation of a disk with reference to outputs of a frequency comparison circuit (38) and the phase comparison circuit (39) are disposed. Therefore, a phase error can be fed back to a spindle motor, thereby preventing linear velocity deviation from occurring in a steady state. By using the thus configured reproducing device, the reproduction quality in the case where a disk wherein recording was performed by the CLV system is reproduced by the variable linear velocity reproduction system is ensured, and both high-speed access and low power consumption are realized.

Abstract: A disk reproducing device comprising: clock signal extracting means for extracting a regenerative clock signal from a reproduced signal; synchronization detecting means for detecting a synchronizing signal from the reproduced signal; extracted clock signal verification means for verifying that the regenerative clock signal is correctly extracted; signal processing means for performing variable linear velocity reproduction; target reproducing speed setting means for setting a target reproducing speed; reproducing speed verification means for verifying that a reproducing speed reaches the target reproducing speed; and signal processing start command generating means for outputting a signal processing start command referring outputs of said extracted clock signal verification means and said reproducing speed verification means.

Abstract: A virtual RAM read address generating circuit (41) generates a virtual address-on the basis of an output signal of a crystal oscillation circuit (36). A phase comparison circuit (39) which performs phase comparison with a write address, and a spindle control circuit (3) which controls rotation of a disk with reference to outputs of a frequency comparison circuit (38) and the phase comparison circuit (39) are disposed. Therefore, a phase error can be fed back to a spindle motor, thereby preventing linear velocity deviation from occurring in a steady state. By using the thus configured reproducing device, the reproduction quality in the case where a disk wherein recording was performed by the CLV system is reproduced by the variable linear velocity reproduction system is ensured, and both high-speed access and low power consumption are realized.

Abstract: A virtual RAM read address generating circuit (41) generates a virtual address on the basis of an output signal of a crystal oscillation circuit (36). A phase comparison circuit (39) which performs phase comparison with a write address, and a spindle control circuit (3) which controls rotation of a disk with reference to outputs of a frequency comparison circuit (38) and the phase comparison circuit (39) are disposed. Therefore, a phase error can be fed back to a spindle motor, thereby preventing linear velocity deviation from occurring in a steady state. By using the thus configured reproducing device, the reproduction quality in the case where a disk wherein recording was performed by the CLV system is reproduced by the variable linear velocity reproduction system is ensured, and both high-speed access and low power consumption are realized.

Abstract: The present invention is directed to the provision of a storage apparatus using a recording area management method and an error recovery processing method suitable for processing moving picture data and the like, wherein empty areas are registered separately in an empty area list for high-speed processing and an empty area list for low-speed processing according the classification made based on the result of comparing the length of each empty area with a minimum area length, and in the event of an error occurrence, a remaining time available for error processing is estimated from the difference between the time required to execute accumulated record or read requests and a limit time, and an error processing method, from among a plurality of error processing methods requiring different lengths of time for processing, is selected and carried out according to the remaining time.

Abstract: The present invention provides the following rotation control method for reducing energy consumption of a motor driving a disk. In a constant speed mode, a supply voltage V1 for driving the motor at a constant speed N1 is selected; however, at a lower constant speed N2, a supply voltage V2 lower than V1 is selected. In an acceleration mode for accelerating the motor speed from N2 to N1, a higher supply voltage than V1 is selected just before starting acceleration, and then V1 is selected after the acceleration. In a speed deceleration mode for decelerating the motor speed from N1 to N2, a lower supply voltage than V1 is selected just before starting deceleration, then the supply voltage V2 is selected after the decleration.