Patents by Inventor Yoshiki Sakuma

Yoshiki Sakuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6777728
    Abstract: A semiconductor device includes a channel layer, a gate electrode formed on the channel layer, a p-type source region formed on a first side of the channel layer, and a p-type drain region formed on a second side of the channel layer. A heavy-hole band and a light-hole band are separated by compressive strain applied isotropically in an in-plane direction in the channel layer. A channel direction connecting the p-type source and drain regions is set substantially to a direction to maximize hole mobility in the channel layer.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: August 17, 2004
    Assignee: Fujitsu Limited
    Inventors: Masashi Shima, Tetsuji Ueno, Yoshiki Sakuma, Shunji Nakamura
  • Publication number: 20030155592
    Abstract: A semiconductor device includes a channel layer, a gate electrode formed on the channel layer, a p-type source region formed on a first side of the channel layer, and a p-type drain region formed on a second side of the channel layer. A heavy-hole band and a light-hole band are separated by compressive strain applied isotropically in an in-plane direction in the channel layer. A channel direction connecting the p-type source and drain regions is set substantially to a direction to maximize hole mobility in the channel layer.
    Type: Application
    Filed: December 27, 2002
    Publication date: August 21, 2003
    Inventors: Masashi Shima, Tetsuji Ueno, Yoshiki Sakuma, Shunji Nakamura
  • Patent number: 6459107
    Abstract: A photodetector includes a substrate and an optical absorption layer provided on the substrate, wherein the optical absorption layer is formed of a mixed crystal of Si, Ge and C.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: October 1, 2002
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Sugiyama, Yoshiki Sakuma
  • Publication number: 20020020851
    Abstract: A heterobipolar transistor includes a base layer formed of a SiGeC ternary mixed crystal having a C concentration profile such that a C concentration in the base layer increases from a first interface facing an emitter layer to a second interface facing a collector layer. Further, the process of forming such a SiGeC ternary mixed crystal layer is disclosed.
    Type: Application
    Filed: March 29, 2001
    Publication date: February 21, 2002
    Applicant: Fujitsu Limited
    Inventor: Yoshiki Sakuma
  • Publication number: 20010035540
    Abstract: A photodetector includes a substrate and an optical absorption layer provided on the substrate, wherein the optical absorption layer is formed of a mixed crystal of Si, Ge and C.
    Type: Application
    Filed: February 27, 2001
    Publication date: November 1, 2001
    Applicant: FUJITSU LIMITED, Kawasaki, Japan
    Inventors: Yoshihiro Sugiyama, Yoshiki Sakuma
  • Patent number: 6235547
    Abstract: In a semiconductor device, concave sections in which an opening area becomes small in proportion as a depth becomes deep are formed in a crystal layer, and a quantum structure is formed on at least one crystal face of a bottom section of the concave section and a border formed between plural sidewalls thereof. In case the quantum structure is formed in the bottom section, a quantum box is formed therein. If the quantum structure is formed in the border between the sidewalls of the concave section, a quantum wire is formed therein. In case the quantum structure is formed in the sidewall of the concave section, a two-dimensional quantum well is formed therein.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: May 22, 2001
    Assignee: Fujitsu Limited
    Inventors: Yoshiki Sakuma, Yoshihiro Sugiyama, Shunichi Muto
  • Patent number: 6011271
    Abstract: In a semiconductor device, concave sections in which an opening area becomes small in proportion as a depth becomes deep are formed in a crystal layer, and a quantum structure is formed on at least one crystal face of a bottom section of the concave section and a border formed between plural sidewalls thereof. In case the quantum structure is formed in the bottom section, a quantum box is formed therein. If the quantum structure is formed in the border between the sidewalls of the concave section, a quantum wire is formed therein. In case the quantum structure is formed in the sidewall of the concave section, a two-dimensional quantum well is formed therein.
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: January 4, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshiki Sakuma, Yoshihiro Sugiyama, Shunichi Muto
  • Patent number: 5922621
    Abstract: A method for fabricating a quantum semiconductor device includes the steps of forming an etch pit of a triangular pyramid on a {111}A-oriented principal surface of a substrate having zinc blende structure by a dry etching process, and depositing semiconductor layers forming a quantum structure consecutively on the etch pit.
    Type: Grant
    Filed: April 8, 1997
    Date of Patent: July 13, 1999
    Assignee: Fujitsu Limited
    Inventor: Yoshiki Sakuma
  • Patent number: 5656821
    Abstract: A semiconductor device is provided, including a semiconductor substrate of zinc blend structure, defined by a principal surface substantially coinciding to a {111}A-oriented crystal surface; an etch pit of the shape of a triangular pyramid, formed on the principal surface of the substrate, the etch pit being defined by side walls merging at an apex of said triangular pyramid, each two of the side walls merging at a valley of the triangular pyramid; and an active part formed on the etch pit; wherein the active part includes a quantum well layer having a first bandgap and provided along the side walls of the etch pit, and a pair of barrier layers having a second, larger bandgap and provided so as to sandwich the quantum well layer.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: August 12, 1997
    Assignee: Fujitsu Limited
    Inventor: Yoshiki Sakuma
  • Patent number: 5574308
    Abstract: A selective growth mask having a plurality of openings is formed on a semiconductor substrate. Desired epitaxially grown regions are formed on the openings by controlling the upward epitaxial growth from the openings. Two resonance tunnel barrier diodes are formed on respective separated two epitaxially grown regions and connected together. Thereafter, a tunnel barrier diode is formed on the connected two resonance tunnel barrier diodes to form a composite functional element having an SRAM function. A number of composite functional elements can be integrally formed on a semiconductor substrate by selective growth and a small number of fine processes.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 12, 1996
    Assignee: Fujitsu Limited
    Inventors: Toshihiko Mori, Yoshiki Sakuma
  • Patent number: 5503105
    Abstract: A deposition method of a compound semiconductor forming a semiconductor device comprises the steps of; covering the surface of a compound semiconductor containing a V group element with a III group element with a thickness of one or more monolayers; and forming a second compound semiconductor containing a V group element different from said V group element on said III group element while utilizing said III group element as a protective film for preventing the desorption of said V group element.
    Type: Grant
    Filed: March 14, 1995
    Date of Patent: April 2, 1996
    Assignee: Fujitsu, Ltd.
    Inventor: Yoshiki Sakuma
  • Patent number: 5438018
    Abstract: A selective growth mask having a plurality of openings is formed on a semiconductor substrate. Desired epitaxially grown regions are formed on the openings by controlling the upward epitaxial growth from the openings. Two resonance tunnel barrier diodes are formed on respective separated two epitaxially grown regions and connected together. Thereafter, a tunnel barrier diode is formed on the connected two resonance tunnel barrier diodes to form a composite element having an SRAM function. A number of composite functional elements can be integrally formed on a semiconductor substrate by selective growth and a small number of fine processes.
    Type: Grant
    Filed: December 7, 1993
    Date of Patent: August 1, 1995
    Assignee: Fujitsu Limited
    Inventors: Toshihiko Mori, Yoshiki Sakuma
  • Patent number: 5429068
    Abstract: A deposition method of a compound semiconductor forming a semiconductor device comprises the steps of; covering the surface of a compound semiconductor containing a V group element with a III group element with a thickness of one or more monolayers; and forming a second compound semiconductor containing a V group element different from said V group element on said III group element while utilizing said III group element as a protective film for preventing the desorption of said V group element.
    Type: Grant
    Filed: October 19, 1993
    Date of Patent: July 4, 1995
    Assignee: Fujitsu Limited
    Inventor: Yoshiki Sakuma
  • Patent number: 5296088
    Abstract: A compound semiconductor crystal growing method includes the steps of (a) setting a substrate having a substrate surface in a reaction chamber, and (b) supplying a material gas of a compound semiconductor which is to be grown in the form of a crystal on the substrate surface within the reaction chamber and a control gas to the reaction chamber under a predetermined condition, and controlling the supply of the control gas to control an adsorption rate of the material gas on the substrate surface. The control gas makes competitive adsorption with the material gas on the substrate surface but makes no chemical reaction such that no continual accumulation on the substrate surface occurs under the predetermined condition. The competitive adsorption is defined as a phenomenon in which the material gas and the control gas compete and become adsorped on the substrate surface.
    Type: Grant
    Filed: August 4, 1992
    Date of Patent: March 22, 1994
    Assignee: Fujitsu Limited
    Inventors: Kunihiko Kodama, Nobuyuki Ohtsuka, Masashi Ozeki, Yoshiki Sakuma
  • Patent number: 5270247
    Abstract: A heterojunction between In-containing compound semiconductors in which the interface thereof is controlled at an atom level is provided by a process of atomic layer epitaxy (ALE) in which hydrogen gas is utilized as a carrier gas and as a purge gas for a separation of source gases. The time for which the purge gas is supplied can be utilized for controlling the ALE.
    Type: Grant
    Filed: July 8, 1992
    Date of Patent: December 14, 1993
    Assignee: Fujitsu Limited
    Inventors: Yoshiki Sakuma, Masashi Ozeki, Nobuyuki Ohtuka, Kunihiko Kodama