Patents by Inventor YOSHIKIKO YASU

YOSHIKIKO YASU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110316620
    Abstract: A semiconductor integrated circuit device having a control signal system for avoiding failure to check an indefinite signal propagation prevention circuit, for facilitating a check included in an automated tool, and for facilitating a power shutdown control inside a chip. In the semiconductor integrated circuit device, power shutdown priorities are provided by independent power domains (Area A to Area I). A method for preventing a power domain having a lower priority from being turned OFF when a circuit having a high priority is turned ON is also provided.
    Type: Application
    Filed: September 2, 2011
    Publication date: December 29, 2011
    Inventors: YUSUKE KANNO, HIROYUKI MIZUNO, YOSHIKIKO YASU, KENJI HIROSE, TAKAHIRO IRITA