Patents by Inventor Yoshiko Furuya

Yoshiko Furuya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiplexer
    Patent number: 6927648
    Abstract: Four frequency components (f1 to f4) (where, f1<f2<f3<f4) are input into a port (10) of a first demultiplexing filter circuit (1), and demultiplexed into low frequency components (f1 and f2) and high frequency components (f3 and f4), and input in a port (20) of a second demultiplexing filter circuit (2) and a port (30) of a third demultiplexing filter circuit (3), respectively. The frequency components (f1 and f2) are demultiplexed into the component (f1) and the component (f2) by the second demultiplexing filter circuit (2), and output from a port (23) and a port (24), respectively. The frequency components (f3 and f4) are demultiplexed into the component (f3) and the component (f4) by the third demultiplexing filter circuit (3), and output from a port (33) and a port (34), respectively.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: August 9, 2005
    Assignee: UBE Industries, Ltd.
    Inventors: Yoshiko Furuya, Hiroshi Ichikawa, Ryuji Oyama, Kazuki Iwashita, Koichi Fukuda, Shinji Furuya
  • Multiplexer
    Publication number: 20040046621
    Abstract: Four frequency components (f1 to f4) (where, f1<f2<f3<f4) are input into a port (10) of a first demultiplexing filter circuit (1), and demultiplexed into low frequency components (f1 and f2) and high frequency components (f3 and f4), and input in a port (20) of a second demultiplexing filter circuit (2) and a port (30) of a third demultiplexing filter circuit (3), respectively. The frequency components (f1 and f2) are demultiplexed into the component (f1) and the component (f2) by the second demultiplexing filter circuit (2), and output from a port (23) and a port (24), respectively. The frequency components (f3 and f4) are demultiplexed into the component (f3) and the component (f4) by the third demultiplexing filter circuit (3), and output from a port (33) and a port (34), respectively.
    Type: Application
    Filed: September 17, 2003
    Publication date: March 11, 2004
    Inventors: Shinji Furuya, Yoshiko Furuya, Hiroshi Ichikawa, Ryuji Oyama, Kazuki Iwashita, Koichi Fukuda