Patents by Inventor Yoshikuni FUJIMOTO

Yoshikuni FUJIMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220367294
    Abstract: A method of manufacturing a silicon carbide semiconductor device. The method includes providing a starting substrate containing silicon carbide, epitaxially growing an epitaxial layer on the starting substrate to thereby form a semiconductor wafer, forming a plurality of scribe lines at a surface of the semiconductor wafer to delineate a plurality of chip regions, forming a mark in the epitaxial layer, the mark being formed in a marking region that is outside the scribe lines, inspecting the epitaxial layer for a crystal defect, forming a device element structure in at least one of the plurality of chip regions, dicing the semiconductor wafer into a plurality of individual semiconductor chips along the plurality of scribe lines, and identifying, as a conforming product candidate, one of the plurality of semiconductor chips that is free of the crystal defect detected during the inspecting.
    Type: Application
    Filed: March 25, 2022
    Publication date: November 17, 2022
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Hidetatsu NAKAMURA, Keiji OKUMURA, Yoshikuni FUJIMOTO
  • Publication number: 20220367274
    Abstract: A method of manufacturing a silicon carbide semiconductor device. The method includes epitaxially growing an epitaxial layer on a starting substrate to form a semiconductor wafer, forming a plurality of scribe lines, including a first scribe line, in the epitaxial layer, forming a mark in the first scribe line, inspecting the epitaxial layer for a crystal defect using crystal defect inspection equipment, which recognizes the first scribe line as being a second scribe line, forming a device element structure in the semiconductor wafer, dicing the semiconductor wafer into semiconductor chips along the scribe lines, and identifying, as a conforming product candidate, one of the semiconductor chips that is free of the crystal defect detected during the inspecting. A distance between an edge of the second scribe line and an edge of the mark, when the first and second scribe lines are aligned, is in a range from 10 ?m to 25 ?m.
    Type: Application
    Filed: March 29, 2022
    Publication date: November 17, 2022
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventors: Hidetatsu NAKAMURA, Keiji OKUMURA, Yoshikuni FUJIMOTO