Patents by Inventor Yoshikuni Kobayashi

Yoshikuni Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139954
    Abstract: A robot system includes: a robot control unit that controls an operation of a robot, using a control parameter for the robot; a safety monitoring unit that monitors the operation of the robot, using a safety monitoring parameter for the robot; a control parameter setting unit that sets the control parameter to the robot control unit; and a safety monitoring parameter setting unit that acquires the control parameter set to the robot control unit, from the robot control unit, and sets at least one of a plurality of parameters included in the acquired control parameter, as the safety monitoring parameter to the safety monitoring unit.
    Type: Application
    Filed: October 26, 2023
    Publication date: May 2, 2024
    Inventors: Keiichi TSUJI, Yoshihito YAMADA, Ryuya YAMAGISHI, Yoshikuni KOBAYASHI, Akira TANABE
  • Patent number: 11153493
    Abstract: A control apparatus includes an angle control unit configured to change an angle between an imaging plane of an image sensor and a plane orthogonal to an optical axis of an imaging lens, an acquisition unit configured to acquire positional information of a specific area of an image, and a management unit configured to change the positional information based on the angle.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: October 19, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yoshikuni Kobayashi, Etsuya Takami
  • Publication number: 20200177820
    Abstract: A control apparatus includes an angle control unit configured to change an angle between an imaging plane of an image sensor and a plane orthogonal to an optical axis of an imaging lens, an acquisition unit configured to acquire positional information of a specific area of an image, and a management unit configured to change the positional information based on the angle.
    Type: Application
    Filed: November 22, 2019
    Publication date: June 4, 2020
    Inventors: Yoshikuni Kobayashi, Etsuya Takami
  • Patent number: 6462630
    Abstract: A wideband noise reducing device has a three level structure including a magnetic member comprising at least one magnetic film, and first and second boards disposed on both sides of the magnetic member so that the magnetic member is sandwiched between the first and second boards. Each of the first and second boards has a signal pattern portion. The signal pattern portions of the first and second boards are connected with each other to form a signal line wound around the magnetic member.
    Type: Grant
    Filed: July 3, 2000
    Date of Patent: October 8, 2002
    Assignee: Oki Electric Cable Co., Ltd.
    Inventors: Eiichi Ikeda, Masanobu Nakamura, Yoshikuni Kobayashi, Masahiro Mukaida
  • Patent number: 5367490
    Abstract: Disclosed is a semiconductor integrated circuit wherein a logic circuit for exchanging signals with RAMS, with the RAMS being disposed centrally on the semiconductor chip or substrate, is divided into a plurality of logic circuits in accordance with the kind of signals and the divided logic circuits are disposed around the RAM in such a manner as to minimize the distance of signal transmission paths with the RAM and in order to attain high speed access to RAMS.
    Type: Grant
    Filed: October 27, 1992
    Date of Patent: November 22, 1994
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd
    Inventors: Kazuhiro Akimoto, Masami Usami, Katsumi Ogiue, Hiroshi Murayama, Hitoshi Abe, Masamori Kashiyama, Yoshikuni Kobayashi, Satoru Isomura, Kinya Mitsumoto
  • Patent number: 5014242
    Abstract: Disclosed is a semiconductor integrated circuit wherein a logic circuit for exchanging signals with RAMS, with the RAMS being disposed centrally on the semiconductor chip or substrate, is divided into a plurality of logic circuits in accordance with the kind of signals and the divided logic circuits are disposed around the RAM in such a manner as to minimize the distance of signal transmission paths with the RAM and in order to attain high speed access to RAMS.
    Type: Grant
    Filed: December 8, 1988
    Date of Patent: May 7, 1991
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Kazuhiro Akimoto, Masami Usami, Katsumi Ogiue, Hiroshi Murayama, Hitoshi Abe, Masamori Kashiyama, Yoshikuni Kobayashi, Satoru Isomura, Kinya Mitsumoto