Abstract: A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly.

Abstract: A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly.

Abstract: Described herein are microelectronic packages and methods of making such packages. Consistent with an example embodiment, the package includes a microelectronic unit. Conductive traces are disposed on a surface of the microelectronic unit. The package also includes a substrate with first and second opposed surfaces. The first surface faces the surface of and is in contact with the microelectronic unit; the second surface has a plurality of terminals configured for electrical connection with a least one external component. The substrate has conductive interconnects that include masses of conductive material joined to the conductive traces and electrically connected with the terminals. Conductive material passes from the second surface to the first surface and contacts the conductive traces and the terminals.

Abstract: The present disclosure is directed to a method for making a microelectronic package that includes assembling a microelectronic unit with a substrate, and electrically connecting redistribution contacts on the microelectronic unit and terminals on the substrate with a conductive matrix material extending within at least one opening extending through the substrate.

Abstract: A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly.

Abstract: A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly.

Abstract: A microelectronic assembly may include a substrate containing a dielectric element having first and second opposed surfaces. The dielectric element may include a first dielectric layer adjacent the first surface, and a second dielectric layer disposed between the first dielectric layer and the second surface. A Young's modulus of the first dielectric layer may be at least 50% greater than the Young's modulus of the second dielectric layer, which is less than two gigapascal (GPa). A conductive structure may extend through the first and second dielectric layers and electrically connect substrate contacts at the first surface with terminals at the second surface. The substrate contacts may be joined with contacts of a microelectronic element through conductive masses, and a rigid underfill may be between the microelectronic element and the first surface. The terminals may be usable to bond the microelectronic assembly to contacts of a component external to the microelectronic assembly.

Abstract: The present disclosure is directed to a method for making a microelectronic package that includes assembling a microelectronic unit with a substrate, and electrically connecting redistribution contacts on the microelectronic unit and terminals on the substrate with a conductive matrix material extending within at least one opening extending through the substrate.

Abstract: A microelectronic package includes a microelectronic unit and a substrate. The microelectronic unit includes a microelectronic element having contacts on a front face. A dielectric material has a first surface substantially flush with the front face of the microelectronic element. Conductive traces have at least portions extending along the front face away from the contacts, at least some of which also extend along the first surface of the dielectric material. Contacts are connected with the traces, at least some of which are disposed at the first surface of the dielectric material. The substrate has first and second opposed surfaces and an edge extending therebetween, the first surface facing the front face of the microelectronic unit, and the second surface having a plurality of terminals thereon configured for electrical connection with at least one external component. Masses of conductive matrix material join the terminals with the redistribution contacts.

Abstract: A microelectronic package and method of making same are provided. The package includes a substrate having first and second opposed surfaces, an edge surface extending therebetween, a plurality of terminals, and a plurality of conductive elements electrically connected with the terminals. The edge surface can be disposed at a periphery of the substrate or can be the edge surface of an aperture within the substrate. A microelectronic element has a front face and contacts thereon, with at least some of the contacts being adjacent to the edge surface of the substrate. A dielectric material overlies the edge surface of the substrate and defines a sloping surface between the front face of the microelectronic element and the substrate. A conductive matrix material defines a plurality of conductive interconnects extending along the sloping surface. The conductive interconnects electrically interconnect respective ones of the contacts with the conductive elements.

Abstract: A microelectronic assembly may include a substrate containing a dielectric element having first and second opposed surfaces. The dielectric element may include a first dielectric layer adjacent the first surface, and a second dielectric layer disposed between the first dielectric layer and the second surface. A Young's modulus of the first dielectric layer may be at least 50% greater than the Young's modulus of the second dielectric layer, which is less than two gigapascal (GPa). A conductive structure may extend through the first and second dielectric layers and electrically connect substrate contacts at the first surface with terminals at the second surface. The substrate contacts may be joined with contacts of a microelectronic element through conductive masses, and a rigid underfill may be between the microelectronic element and the first surface. The terminals may be usable to bond the microelectronic assembly to contacts of a component external to the microelectronic assembly.

Abstract: A microelectronic package includes a microelectronic unit and a substrate. The microelectronic unit includes a microelectronic element having contacts on a front face. A dielectric material has a first surface substantially flush with the front face of the microelectronic element. Conductive traces have at least portions extending along the front face away from the contacts, at least some of which also extend along the first surface of the dielectric material. Contacts are connected with the traces, at least some of which are disposed at the first surface of the dielectric material. The substrate has first and second opposed surfaces and an edge extending therebetween, the first surface facing the front face of the microelectronic unit, and the second surface having a plurality of terminals thereon configured for electrical connection with at least one external component. Masses of conductive matrix material join the terminals with the redistribution contacts.

Abstract: A microelectronic package and method of making same are provided. The package includes a substrate having first and second opposed surfaces, an edge surface extending therebetween, a plurality of terminals, and a plurality of conductive elements electrically connected with the terminals. The edge surface can be disposed at a periphery of the substrate or can be the edge surface of an aperture within the substrate. A microelectronic element has a front face and contacts thereon, with at least some of the contacts being adjacent to the edge surface of the substrate. A dielectric material overlies the edge surface of the substrate and defines a sloping surface between the front face of the microelectronic element and the substrate. A conductive matrix material defines a plurality of conductive interconnects extending along the sloping surface. The conductive interconnects electrically interconnect respective ones of the contacts with the conductive elements.

Abstract: A microelectronic assembly may include a microelectronic element having a plurality of element contacts at a face thereof, and a compliant dielectric element having a Young's modulus of less than about two gigapascal (GPa) and substrate contacts at a first surface joined to the element contacts. The substrate contacts may be electrically connected with terminals at a second surface of the compliant dielectric element that opposes the first surface, through conductive vias in the compliant dielectric element. A rigid underfill may be between the face of the microelectronic element and the first surface of the compliant dielectric element. The terminals may be usable for bonding the microelectronic assembly to corresponding contacts of a component external to the microelectronic assembly.

Abstract: A microelectronic assembly may include a substrate including a rigid dielectric layer having electrically conductive elements, a microelectronic element having a plurality of contacts exposed at a face thereof, and conductive vias extending through a compliant dielectric layer overlying the rigid dielectric layer. The vias electrically connect the substrate contacts respectively to the conductive elements, and the substrate contacts are joined respectively to the contacts of the microelectronic element. The vias, compliant layer and substrate contacts are adapted to appreciably relieve stress at the substrate contacts associated with differential thermal contact and expansion of the assembly.

Abstract: Example embodiments of a semiconductor chip packaging apparatus and method thereof are disclosed. The packaging apparatus may include a plating unit to perform a conductive plating process to form a conductive plating layer on external terminals of a semiconductor chip package, and a reflow unit adapted to melt the conductive plating layer. The plating unit and reflow unit may be disposed in a single line with the plating module. Thus, it is possible to effectively suppress the growth of whiskers on the plating layer of the external terminals, and to secure economical efficiency, reducing costs, and allowing mass production.

Abstract: A container has an upper opening, a plurality of semiconductor elements and electrode terminals connected to the semiconductor elements. A cover member closing the opening has insertion holes formed therethrough from its lower surface to its upper surface. The cover member is coupled with the container by inserting the electrode terminals through the insertion holes to make them vertically project from the upper surface, and bending the projecting electrode terminals. The cover member has projections provided adjacent to the insertion holes. Each of the vertically projecting electrode terminals is bent through more than 90.degree. over a corresponding one of the projections, with its bent corner portion supported on the edge of the projection, and arranged parallel to the upper surface of the cover member as a result of a spring back effect.