Patents by Inventor Yoshimasa Daidoh

Yoshimasa Daidoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5005186
    Abstract: A digital demodulation apparatus which has a detector (11) for receiving transmission signals (S.sub.in) modulated under a multivalue quadrature amplitude modulation method in accordance with a honeycomb signal structure point arrangement. The detector produces I channel and Q channel demodulation signals. The apparatus also includes a discriminator (13) which converts the analog demodulation signals (Sa) to digital demodulation signals (Sd), a memory (21) which successively receives said digital demodulation signals (Sd) and reproduces corresponding original data. The read only memory (21) stores data representatives of the honeycomb signal structure point arrangement, and stores polarity bits (P) and error bits (.epsilon.) of the signal points.
    Type: Grant
    Filed: October 13, 1988
    Date of Patent: April 2, 1991
    Assignee: Fujitsu Limited
    Inventors: Yoshihito Aono, Takanori Iwamatsu, Morihiko Minowa, Sadao Takenaka, Yoshimasa Daidoh, Hiroshi Nakamura, Nobutsugu Fujino
  • Patent number: 4809298
    Abstract: The present invention relates to a radio transmission system. The system includes a transversal type automatic equalizer which controls tap weight based on bit error rate (BER) from a pseudo error pulse. In the equalizer, the threshold value (BER1) which defines the mode change for tap weighting control from normal to reset is different from the threshold value (BER2) from reset to normal. Therefore, the mode change is carried out by a simple circuit properly and stably.
    Type: Grant
    Filed: April 30, 1987
    Date of Patent: February 28, 1989
    Assignee: Fujitsu Limited
    Inventors: Toshiaki Sakane, Sadao Takenaka, Morihiko Minowa, Yoshihito Aono, Yoshimasa Daidoh