Patents by Inventor Yoshimasa Hosono
Yoshimasa Hosono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6657853Abstract: An information processing apparatus is disclosed which occupies a minimized space when it is not used. The information processing apparatus includes a stand including a base and a support arm extending uprightly from the base, a display unit supported for pivotal motion on the support arm, and a keyboard having a plurality of operation keys provided thereon. The support arm includes an upper arm portion and a lower arm portion. The upper arm portion has an upper pivotal fulcrum at an upper end portion thereof for supporting the display unit for pivotal motion, and the lower arm portion has a lower pivotal fulcrum provided at an upper end portion thereof for supporting the upper arm portion for pivotal motion.Type: GrantFiled: September 4, 2001Date of Patent: December 2, 2003Assignee: Sony CorporationInventors: Haruo Oba, Hiroji Yoshino, Yoshimasa Hosono, Koji Nishimura
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Publication number: 20020068985Abstract: An information processing apparatus is disclosed which occupies a minimized space when it is not used. The information processing apparatus includes a stand including a base and a support arm extending uprightly from the base, a display unit supported for pivotal motion on the support arm, and a keyboard having a plurality of operation keys provided thereon. The support arm includes an upper arm portion and a lower arm portion. The upper arm portion has an upper pivotal fulcrum at an upper end portion thereof for supporting the display unit for pivotal motion, and the lower arm portion has a lower pivotal fulcrum provided at an upper end portion thereof for supporting the upper arm portion for pivotal motion.Type: ApplicationFiled: September 4, 2001Publication date: June 6, 2002Inventors: Haruo Oba, Hiroji Yoshino, Yoshimasa Hosono, Koji Nishimura
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Patent number: 5905846Abstract: Input MPEG coded image data is input through a buffer to a variable length decoding unit where it is subject to variable length decoding. The quantized DCT coefficients are output to an inverse quantization unit, while the motion vectors are output to a motion compensation prediction unit. The quantized DCT coefficients are inversely quantized at the inverse quantization unit to generate DCT coefficients. The DCT coefficients have values of the items of frequencies higher than the desired frequency limit converted to 0 at the DCT coefficient conversion unit whereby the motion data found at the format conversion unit is added at the adder and the result input as the original image data to the format conversion unit. The pixels are thinned at the format conversion unit to generate a compressed image which is then displayed on a display unit.Type: GrantFiled: May 21, 1997Date of Patent: May 18, 1999Assignee: Sony CorporationInventors: Yukihisa Tsuneda, Yoshimasa Hosono, Makoto Shingyouchi, Masahiro Watanabe
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Patent number: 5856930Abstract: According to the present invention, when image data high-efficiency-coded based on the MPEG standard or the like is clustered at every sector of a predetermined number, a link sector is provided at a connected portion of each cluster and the image data is interleaved and recorded on a mini disc, the image data is recorded on each cluster at the unit of 1GOP. When the mini disc is a preformatted one and a P picture or B picture exists at the starting portion of the cluster, a picture which becomes a predictive standard is encoded as an I picture and recorded on the link sector of the immediately-preceding cluster independently of an original P picture. Upon decoding, when the I picture was not recorded on the link sector of the immediately-preceding cluster, the P picture or the B picture recorded at the starting portion of the cluster is inhibited from substantially being decoded.Type: GrantFiled: November 14, 1994Date of Patent: January 5, 1999Assignee: Sony CorporationInventor: Yoshimasa Hosono
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Patent number: 5796438Abstract: A method for processing the information of a still picture of high resolution displayed on a television screen is disclosed. The method includes the steps of receiving the picture information encoded by a pre-set encoding method, generating the averaging information specifying which interpolation is to be performed on the received picture information, decoding the picture information by a decoding method corresponding to the encoding method, storing the decoded picture information in a memory, reading out the stored picture information for processing the decoded picture information with interpolation, and outputting the interpolated picture information as a picture for display. An apparatus for carrying out the information processing method is also disclosed.Type: GrantFiled: June 23, 1995Date of Patent: August 18, 1998Assignee: Sony CorporationInventor: Yoshimasa Hosono
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Patent number: 5687160Abstract: An information recording medium with recorded picture information and/or the speech information is made up of plural lists at least a portion of which record item information and playback control information. The item information indicates the one or plural items reproduced based upon the list, while the playback control information contains a pointer represented by an offset from the leading end of the playback control information indicating a connection to a separate list. An information reproducing apparatus when reproducing the picture information or the like from the information recording medium reproduces the picture information or the like from the picture recording medium responsive to the information selected under instructions by the user from among the playback control information data reproduced from the information recording medium. The information designated by the user may be reproduced or accessed easily.Type: GrantFiled: August 8, 1995Date of Patent: November 11, 1997Assignee: Sony CorporationInventors: Hidenori Aotake, Yoshimasa Hosono, Toshimasa Mizunashi, Shuhei Nakada
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Patent number: 5457675Abstract: A picture reproducing apparatus includes a CD-ROM drive for fetching compressed video image data from a disc on which initial I-picture data for an initial picture for a menu display and a plurality of updating P-picture data for partially updating the initial picture are recorded. The picture reproducing apparatus also includes a RAN having a capacity of at least one video image frame and having an updating picture data storage area, an MPEG decoder for decoding MPEG encoded picture data and a CPU for initially transmitting the initial picture data and subsequently transmitting the updating picture data to the decoder. By making a picture display for displaying menu items or the like with the aid of a compressed picture decoder as used for displaying the compressed moving picture or still picture, the menu items or the like may be displayed without employing a graphic display circuit.Type: GrantFiled: January 13, 1994Date of Patent: October 10, 1995Assignee: Sony CorporationInventors: Kazuhiro Suzuki, Yoshimasa Hosono, Hidenori Aotake
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Patent number: 5019816Abstract: A decoding apparatus comprises detecting circuit for detecting a leading edge of a request signal which requests transmission of sequential data as digital signal, clock generator for generating a clock signal in response to an output signal from detecting circuits, and decoding circuit for decoding sequential data in accordance with the clock signal.Type: GrantFiled: June 26, 1990Date of Patent: May 28, 1991Assignee: Sony CorporationInventor: Yoshimasa Hosono
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Patent number: 4870572Abstract: Two or more processors with differing address space sizes are used in a multi-processor system. A portion of the memory means accessible by the first processor with a larger address space size is also accessible by the second processor for elevating a utilization efficiency of the memory capacity. A window for the memory space of the second processor is provided in the address space of the first processor. The memory devices controlled by the second processor are controlled through this window by the first processor as well for elevating the utilization efficiency of the memory devices.Type: GrantFiled: March 13, 1986Date of Patent: September 26, 1989Assignee: Sony CorporationInventors: Yoshimasa Hosono, Toshio Uno