Patents by Inventor Yoshimasa MISHUKU

Yoshimasa MISHUKU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230289960
    Abstract: A storage medium storing an image diagnosis support program for causing a computer to execute process that includes inputting input images to a first model that outputs, according to input images obtained by imaging a subject under the plurality of imaging conditions, an estimation result of a disease name of the, and a degree of contribution to estimation of each of input images for each of the imaging conditions; selecting, among input images, an image imaged under an imaging condition for estimation selected based on the degree of contribution; inputting the image imaged under the imaging condition for estimation to a second model that outputs an estimation result of a lesion part in the image according to the input image; and outputting the estimation result of the lesion part specified based on an output result of the second model.
    Type: Application
    Filed: January 11, 2023
    Publication date: September 14, 2023
    Applicant: Fujitsu Limited
    Inventors: Masaki TAKEUCHI, Yoshimasa MISHUKU, Masataka UMEDA
  • Publication number: 20220383477
    Abstract: A non-transitory computer-readable recording medium having stored therein an evaluation program for causing a computer to execute a process including: specifying a plurality of partial images included in input image data by inputting the input image data into a detection model, the detection model being a machine learning model trained with a first training data set including a plurality of first training data each associating image data with a partial image which contains an extraction target from the image data; and evaluating the input image data by inputting the plurality of specified partial images into an evaluation model, the evaluation model being a machine learning model trained with a second training data set including a plurality of second training data each associating one or more partial images with an evaluation result of a target being a subject of an image containing the one or more partial images.
    Type: Application
    Filed: March 10, 2022
    Publication date: December 1, 2022
    Applicant: FUJITSU LIMITED
    Inventors: Masataka Umeda, Yoshimasa MISHUKU
  • Publication number: 20200012450
    Abstract: A storage system includes a plurality of server nodes including a first server node and a second server node paired with the first server node, and a manager node configured to manage the plurality of server nodes, wherein the first server node is configured to transmit a notification to the manager node in response to detecting that the second server node is down, and the notification indicates that the second server node is down, and wherein the manager node is configured to execute a first process related to a second process executed by the second server node in response to receiving the notification.
    Type: Application
    Filed: June 17, 2019
    Publication date: January 9, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Masaki Takeuchi, Yoshimasa MISHUKU, Yutaro Hiraoka
  • Publication number: 20190227890
    Abstract: An information processing apparatus transmits a task executing request to a first control node to execute a task including multiple processes among multiple control nodes; and stores management information associating the task executing request transmitted to the first control node with a response result received from the first control node. The task executing request includes: a command to execute the task; a command to respond with a first notification indicating normal completion of the plurality of processes; a command to execute, when execution of at least one of the processes fails, a regaining process that regains statuses of one or more remaining processes successfully executed to statuses before being executed; and a command to response, when the regaining process is normally completed, a second notification indicating normal completion of the regaining process. Accordingly, the load on a control node managing multiple control nodes can be reduced.
    Type: Application
    Filed: December 17, 2018
    Publication date: July 25, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Masaki Takeuchi, Yoshimasa MISHUKU, Yutaro Hiraoka
  • Publication number: 20190220209
    Abstract: An information processing apparatus includes a memory; a processor coupled to the memory; and one or more resources, the processor being configured to allow a plurality of the processes to be performed on one of the one or more resources to obtain the exclusion in parallel by optimistic locking control in a first phase, and execute one of the plurality of processes on the resource in a state where the exclusion is obtained by pessimistic locking control in a second phase.
    Type: Application
    Filed: December 20, 2018
    Publication date: July 18, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yoshimasa MISHUKU, Goro Yamada, Yutaro Hiraoka, Masaki Takeuchi
  • Patent number: 10089201
    Abstract: A virtualization controller identifies a node that manages a segment to be accessed, and instructs the node to access the segment. A mirror controller of the node instructed to access the segment writes data in the segment managed by the node and in a segment having a mirror relation with the segment managed by the node.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: October 2, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Hiroyuki Yamashita, Tomohiro Uno, Yasuhito Kikuchi, Yoshimasa Mishuku
  • Patent number: 9779002
    Abstract: A control module that manages a segment to which data is written implements write processing and resynchronization processing using a bitmap managed for each LUN. In other words, the control module stores the bitmap for the managed LUN in a bitmap storage unit. A mirror LUN control unit sets a corresponding portion of the bitmap to 1, controls data write to a target segment and a mirror segment, and resets the bitmap to 0 when the data write to both of the segments is complete. A resynchronization control unit refers to the bitmap storage unit to perform the resynchronization processing.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: October 3, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Kenichi Fujita, Hidejirou Daikokuya, Yoshimasa Mishuku
  • Publication number: 20170255408
    Abstract: By providing a virtual integrated disk creating unit configured to create a single virtual integrated disk by virtually integrating storage areas of a plurality of storage devices, and a target setting unit configured to set a login target to which a login to the virtual integrated disk from an outside is made, the time to log in to storage areas in multiple storage device provided in another node can be reduced.
    Type: Application
    Filed: February 21, 2017
    Publication date: September 7, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Hidejirou DAIKOKUYA, Yoshimasa MISHUKU, Ryota TSUKAHARA, Toshiaki TAKEUCHI, Akira Satou
  • Patent number: 9600383
    Abstract: A storage controller out of a plurality of storage controllers used in a storage system, each of the plurality of storage controllers being configured to control mirror processing of data, the storage controller comprising: circuitry configured to: determine a storage controller of a destination of an input and output request for a volume, out of the plurality of storage controllers, based on mirror device information where identifiers and priorities of the respective storage controllers are stored while being associated with each other for each of mirror processing units, and state information being for each of storage controllers and indicating whether the storage controller is normal or not, and issue the input and output request to the determined storage controller.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: March 21, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Yoshimasa Mishuku, Hidejirou Daikokuya, Kenichi Fujita
  • Publication number: 20160259579
    Abstract: A processor generates, according to difference information that represents a difference between stationary points in a volume that represents a management unit for a storage area and that is associated with a plurality of generations, aggregate information in which the difference information for the plurality of generations is aggregated. The processor is configured to associate the aggregate information with a state of the volume at an oldest stationary point. The processor is configured to associate update information for a volume that has been updated from a state of the volume at a latest stationary point.
    Type: Application
    Filed: February 1, 2016
    Publication date: September 8, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Goro Yamada, Yoshimasa MISHUKU, Tomoaki Sasaki, Nina Tsukamoto
  • Patent number: 9430161
    Abstract: The first storage area stores original data of an update target that is to be updated by a host. The controller divides data to be written over the original data of the update target stored in the first storage area into a plurality of pieces of update data and thereby distributes the plurality of pieces of update data for each of successive addresses. The second storage area stores the plurality of update data distributed by the controller. The third storage area stores information in which an update area address, which is an address of the first storage area to be overwritten by the plurality of pieces of update data of the original data of the update target, is associated with a storage destination address, which is an address of the second storage area that has stored the plurality of pieces of update data.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: August 30, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Akito Yamazaki, Yoshimasa Mishuku, Hiroshi Murayama, Kazunori Kobashi
  • Publication number: 20160224446
    Abstract: A storage controller out of a plurality of storage controllers used in a storage system, each of the plurality of storage controllers being configured to control mirror processing of data, the storage controller comprising: circuitry configured to: determine a storage controller of a destination of an input and output request for a volume, out of the plurality of storage controllers, based on mirror device information where identifiers and priorities of the respective storage controllers are stored while being associated with each other for each of mirror processing units, and state information being for each of storage controllers and indicating whether the storage controller is normal or not, and issue the input and output request to the determined storage controller.
    Type: Application
    Filed: December 28, 2015
    Publication date: August 4, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Yoshimasa Mishuku, Hidejirou Daikokuya, Kenichi Fujita
  • Publication number: 20160026398
    Abstract: A virtualization controller identifies a node that manages a segment to be accessed, and instructs the node to access the segment. A mirror controller of the node instructed to access the segment writes data in the segment managed by the node and in a segment having a mirror relation with the segment managed by the node.
    Type: Application
    Filed: June 24, 2015
    Publication date: January 28, 2016
    Inventors: Hiroyuki Yamashita, Tomohiro UNO, Yasuhito Kikuchi, Yoshimasa MISHUKU
  • Publication number: 20160026548
    Abstract: A control module that manages a segment to which data is written implements write processing and resynchronization processing using a bitmap managed for each LUN. In other words, the control module stores the bitmap for the managed LUN in a bitmap storage unit. A mirror LUN control unit sets a corresponding portion of the bitmap to 1, controls data write to a target segment and a mirror segment, and resets the bitmap to 0 when the data write to both of the segments is complete. A resynchronization control unit refers to the bitmap storage unit to perform the resynchronization processing.
    Type: Application
    Filed: June 16, 2015
    Publication date: January 28, 2016
    Inventors: Kenichi Fujita, Hidejirou DAIKOKUYA, Yoshimasa MISHUKU
  • Publication number: 20140297955
    Abstract: The first storage area stores original data of an update target that is to be updated by a host. The controller divides data to be written over the original data of the update target stored in the first storage area into a plurality of pieces of update data and thereby distributes the plurality of pieces of update data for each of successive addresses. The second storage area stores the plurality of update data distributed by the controller. The third storage area stores information in which an update area address, which is an address of the first storage area to be overwritten by the plurality of pieces of update data of the original data of the update target, is associated with a storage destination address, which is an address of the second storage area that has stored the plurality of pieces of update data.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 2, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Akito YAMAZAKI, Yoshimasa MISHUKU, Hiroshi Murayama, Kazunori Kobashi