Patents by Inventor Yoshimi Sudo

Yoshimi Sudo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9362184
    Abstract: A semiconductor device having Cu wiring including a basic crystal structure which can reduce surface voids, and an inspecting technique for the semiconductor device. In the semiconductor device, surface voids can be reduced down to 1/10 or less of a current practical level by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 27 or less to all crystal grain boundaries of a Cu wiring to 60% or higher. Alternatively, a similar effect of surface void reduction can be obtained by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 3 to all crystal grain boundaries of a Cu wiring to 40% or higher.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: June 7, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takahiko Kato, Hiroshi Nakano, Haruo Akahoshi, Yuuji Takada, Yoshimi Sudo, Tetsuo Fujiwara, Itaru Kanno, Tomoryo Shono, Yukinori Hirose
  • Publication number: 20150104889
    Abstract: A semiconductor device having Cu wiring including a basic crystal structure which can reduce surface voids, and an inspecting technique for the semiconductor device. In the semiconductor device, surface voids can be reduced down to 1/10 or less of a current practical level by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 27 or less to all crystal grain boundaries of a Cu wiring to 60% or higher. Alternatively, a similar effect of surface void reduction can be obtained by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 3 to all crystal grain boundaries of a Cu wiring to 40% or higher.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 16, 2015
    Inventors: Takahiko KATO, Hiroshi NAKANO, Haruo AKAHOSHI, Yuuji TAKADA, Yoshimi SUDO, Tetsuo FUJIWARA, Itaru KANNO, Tomoryo SHONO, Yukinori HIROSE
  • Patent number: 8946895
    Abstract: A semiconductor device having Cu wiring including a basic crystal structure which can reduce surface voids, and an inspecting technique for the semiconductor device. In the semiconductor device, surface voids can be reduced down to 1/10 or less of a current practical level by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 27 or less to all crystal grain boundaries of a Cu wiring to 60% or higher. Alternatively, a similar effect of surface void reduction can be obtained by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 3 to all crystal grain boundaries of a Cu wiring to 40% or higher.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: February 3, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Takahiko Kato, Hiroshi Nakano, Haruo Akahoshi, Yuuji Takada, Yoshimi Sudo, Tetsuo Fujiwara, Itaru Kanno, Tomoryo Shono, Yukinori Hirose
  • Publication number: 20090218694
    Abstract: A semiconductor device having Cu wiring including a basic crystal structure which can reduce surface voids, and an inspecting technique for the semiconductor device. In the semiconductor device, surface voids can be reduced down to 1/10 or less of a current practical level by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 27 or less to all crystal grain boundaries of a Cu wiring to 60% or higher. Alternatively, a similar effect of surface void reduction can be obtained by specifying a barrier layer and a seed layer and setting a proportion (frequency) of occupation of a coincidence site lattice (CSL) boundary having a grain boundary Sigma value 3 to all crystal grain boundaries of a Cu wiring to 40% or higher.
    Type: Application
    Filed: February 20, 2009
    Publication date: September 3, 2009
    Inventors: Takahiko KATO, Hiroshi NAKANO, Haruo AKAHOSHI, Yuuji TAKADA, Yoshimi SUDO, Tetsuo FUJIWARA, Itaru KANNO, Tomoryo SHONO, Yukinori HIROSE
  • Publication number: 20070134920
    Abstract: A Cu wiring formation method comprises the steps of: forming a Cu film on a wafer by plating; subjecting the Cu film to anticorrosive treatment on the surface thereof after the plating; and annealing the Cu film after the anticorrosive treatment.
    Type: Application
    Filed: November 3, 2006
    Publication date: June 14, 2007
    Applicant: Renesas Technology Corp.
    Inventors: Shinya Hirano, Yoshimi Sudo, Tetsunori Imaizumi, Yasuhiro Yoshida
  • Patent number: 5877498
    Abstract: An X-ray analyzing method for inspecting opening states of fine holes comprises the steps of: irradiating a finely converged electron beam into a first fine hole, observing an X-ray emitted from the inside of said first fine hole in order to obtain an first X-ray analysis data about the residue substance existing at the bottom of said first fine hole; irradiating a finely converged electron beam into a second fine hole, observing an X-ray emitted from the inside of said second fine hole in order to obtain an second X-ray analysis data about the residue substance existing at the bottom of said second fine hole; and comparing said first X-ray analysis data with said second X-ray analysis data, forming a judgment as to whether or not a difference between said first and second analysis data is smaller than a predetermined threshold value and using an outcome of said judgment to determine the opening states of said first and second fine holes.
    Type: Grant
    Filed: July 15, 1997
    Date of Patent: March 2, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Aritoshi Sugimoto, Yoshimi Sudo, Tokuo Kure, Ken Ninomiya, Katsuhiro Kuroda, Takashi Nishida, Hideo Todokoro, Yasuhiro Mitsui, Hiroyasu Shichi
  • Patent number: 5594246
    Abstract: An X-ray analyzing method includes the steps of applying an irradiated electron beam, converged by a condenser lens and an objective lens into a thin beam, to the inside of a fine hole existing on the surface of a sample; observing X-rays generated from a residual substance existing inside the fine hole; and performing a qualitative and quantitative analysis of the residual substance. The X-rays are observed by an X-ray detector installed in an internal space of the condenser lens, an internal space of the objective lens, or between the condenser lens and the objective lens, by detecting only the X-rays radiated within the angular range -.theta. to +.theta., where .theta. is an angle formed with a center axis of the electron beam, and so defined that tan .theta. is substantially equal to a/d, where a and d are the radius and the depth of the fine hole, respectively.
    Type: Grant
    Filed: April 25, 1995
    Date of Patent: January 14, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Yoshimi Sudo, Tokuo Kure, Ken Ninomiya, Katsuhiro Kuroda, Takashi Nishida, Hideo Todokoro, Yasuhiro Mitsui, Hiroyasu Shichi
  • Patent number: 4806293
    Abstract: Method of producing a molded article of a foamed thermoplastic resin. A molten mass of an expandable thermoplastic resin is accumulated in an accumulator while it is prevented from foaming. A predetermined quantity of the accumulated thermoplastic resin is ejected rapidly from the accumulator into the atmosphere so that the thermoplastic resin commences foaming. The ejected thermoplastic resin is placed in a mold cavity before the foaming expansion has been completed and is compressed. The expansion and molding of the ejected thermoplastic resin is completed in the mold while controlling the compression pressure to obtain a foamed molded article.
    Type: Grant
    Filed: April 10, 1987
    Date of Patent: February 21, 1989
    Assignee: Japan Styrene Paper Corporation
    Inventors: Hiroyuki Akiyama, Yoshimi Sudo, Masahiko Kishida, Mitsuru Nishida
  • Patent number: 4695593
    Abstract: Prefoamed polypropylene-base particles have a crystalline structure featuring a high-temperature peak appeared on the higher temperature side than the peak inherent to polypropylene-base resins on a DSC curve obtained by differential scanning calorimetry upon heating 1-3 mg of the prefoamed polypropylene-base particles at a constant heating rate of 10.degree. C./min. to 220.degree. C. by means of a differential scanning calorimeter and the internal pressure decreasing velocity coefficient k of the particles is either equal to or smaller than 0.70 (k.ltoreq.0.70) at 25.degree. C. and 1 atm. The prefoamed polypropylene-base particles can be formed into an expansion-molded polypropylene-base article by imparting foamability to the particles, filling the resultant particles in a mold and then heating the particles so as to cause their expansion.
    Type: Grant
    Filed: February 21, 1986
    Date of Patent: September 22, 1987
    Assignee: Japane Styrene Paper Corporation
    Inventors: Hideki Kuwabara, Atsushi Kitagawa, Yoshimi Sudo
  • Patent number: 4617323
    Abstract: Prefoamed crosslinked propylene-type resin particles prepared by using as a base resin a propylene random copolymer whose amount of heat of crystallization determined by a DSC method is 19 to 10 cal/g. The prefoamed particles have a gel fraction of 1 to 65%. Also provided is a molded article of a crosslinked propylene-type resin which is a fused aggregate of the aforesaid prefoamed particles in which the number of cells, N per mm.sup.2, and the density, d (g/cm.sup.3), have the relation represented by the expression 2<N.sup.1/2 /d.sup.1/3 <45.
    Type: Grant
    Filed: February 12, 1985
    Date of Patent: October 14, 1986
    Assignee: Japan Styrene Paper Corporation
    Inventors: Hideki Kuwabara, Yoshimi Sudo, Atusi Kitagawa
  • Patent number: 4587270
    Abstract: Preliminarily foamed particles of a non-crosslinked polypropylene resin based on an alpha-olefin/propylene random copolymer having an amount of the heat of crystallization in the range of 5 to 15 cal/g, said preliminarily foamed particles having such a crystal structure that when a DSC curve is drawn by means of a differential scanning calorimeter, by heating 1 to 3 mg of the preliminarily foamed particles to 220.degree. C. at a rate of 10.degree. C./min., a high temperature peak is observed at a higher temperature than the temperature of the peak inherent to the base resin.
    Type: Grant
    Filed: November 21, 1984
    Date of Patent: May 6, 1986
    Assignee: Japan Styrene Paper Corporation
    Inventors: Hideki Kuwabara, Yoshimi Sudo
  • Patent number: 4567208
    Abstract: Preliminarily foamed particles of a non-crosslinked polypropylene-type resin based on a mixture of 10 to 95% by weight of an alpha-olefin/propylene random copolymer having an amount of the heat of crystallization of not more than 10 cal/g in differential scanning calorimetry and 90 to 5% by weight of an ethylene/propylene random copolymer as a base resin, said preliminarily foamed particles having such a crystal structure that when a DSC curve is drawn by heating 1 to 3 mg of the preliminarily foamed particles to 220.degree. C. at a rate of 10.degree. C./min. by means of a differential scanning calorimeter, a high temperature peak is observed at a higher temperature than the temperature of the peak inherent to the base resin. These preliminarily foamed articles can be molded under lower vapor pressures than in the prior art.
    Type: Grant
    Filed: December 5, 1984
    Date of Patent: January 28, 1986
    Assignee: Japan Styrene Paper Corporation
    Inventors: Hideki Kuwabara, Yoshimi Sudo
  • Patent number: 4504653
    Abstract: A process for producing particles having an increased particle diameter from a powder of a polyolefin resin, which comprises heating the polyolefin resin powder at a temperature higher than the melting point of the resin in a dispersion medium in the presence of a dispersing agent and a surface-active agent.
    Type: Grant
    Filed: May 25, 1983
    Date of Patent: March 12, 1985
    Assignee: Japan Styrene Paper Corporation
    Inventors: Hideki Kuwabara, Shohei Yoshimura, Toru Yamaguchi, Yoshimi Sudo
  • Patent number: 4504601
    Abstract: A process for producing pre-foamed particles of a polypropylene resin which comprises expanding original pre-foamed particles of a polypropylene resin, said original pre-foamed particles having the following relation2<E.sup.1/3 .times.n.sup.1/2 <45wherein E is the expansion ratio of the original pre-foamed particles, and n is the number of cells per mm.sup.2 of the cross section of the original pre-foamed particles,by (1) imparting expanding ability to the original pre-foamed particles and then heating them with a heated gas to the heat distortion temperature of the base resin of the pre-foamed particles or a higher temperature or (2) heating the original pre-foamed particles with steam to the heat distortion temperature of the base resin of the particles or a higher temperature with or without imparting expanding ability thereto, whereby pre-foamed particles having an expansion ratio higher than the original expansion ratio E are obtained.
    Type: Grant
    Filed: September 29, 1983
    Date of Patent: March 12, 1985
    Assignee: Japan Styrene Paper Corporation
    Inventors: Hideki Kuwabara, Shohei Yoshimura, Toru Yamaguchi, Yoshimi Sudo