Patents by Inventor Yoshimitsu Kato
Yoshimitsu Kato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11958103Abstract: Inorganic coated sand in a dry state having refractory aggregate; and an inorganic binder layer formed on a surface of the refractory aggregate, in which the inorganic binder layer contains a metasilicate hydrate.Type: GrantFiled: June 24, 2019Date of Patent: April 16, 2024Assignee: KAO CORPORATIONInventors: Yoshimitsu Ina, Masayuki Kato
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Patent number: 10488761Abstract: According to one embodiment, there is provided an exposure apparatus, including a focus detecting system, a stage, and a controller. On the stage, a substrate is to be mounted. The controller performs focus measurement on an incomplete shot area, part of which is outside a pattern forming area of the substrate, by the focus detecting system. The controller obtains amounts of defocus of a plurality of planes that are candidates for approximating the incomplete shot area according to the result of measuring the incomplete shot area. The controller decides on a plane to approximate the incomplete shot area from among the plurality of planes according to the amounts of defocus of the plurality of planes. The controller drives the stage using a focus-leveling value according to the decided-on plane so as to control a surface position of the incomplete shot area.Type: GrantFiled: March 1, 2018Date of Patent: November 26, 2019Assignee: Toshiba Memory CorporationInventor: Yoshimitsu Kato
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Publication number: 20190079402Abstract: According to one embodiment, there is provided an exposure apparatus, including a focus detecting system, a stage, and a controller. On the stage, a substrate is to be mounted. The controller performs focus measurement on an incomplete shot area, part of which is outside a pattern forming area of the substrate, by the focus detecting system. The controller obtains amounts of defocus of a plurality of planes that are candidates for approximating the incomplete shot area according to the result of measuring the incomplete shot area. The controller decides on a plane to approximate the incomplete shot area from among the plurality of planes according to the amounts of defocus of the plurality of planes. The controller drives the stage using a focus-leveling value according to the decided-on plane so as to control a surface position of the incomplete shot area.Type: ApplicationFiled: March 1, 2018Publication date: March 14, 2019Applicant: Toshiba Memory CorporationInventor: Yoshimitsu Kato
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Patent number: 9760017Abstract: According to one embodiment, wafer lithography equipment includes an exposure unit transferring a circuit pattern onto a wafer, a measurement unit measuring a dimension of the circuit pattern and a calculator. The calculator includes calculating a first difference. The first difference is the difference between a first dimension and a second dimension. The first dimension is obtained by substituting a first exposure amount and a first focus distance into an approximate response surface function. The second dimension is measured by the measurement unit. The calculator also includes calculating a second difference. The second difference is the sum total of the first difference for all of the circuit patterns. The calculator also includes calculating a second exposure amount and a second focus distance causing the difference between the approximate response surface function and the second difference to be a minimum. The calculator also includes calculating a correction exposure amount.Type: GrantFiled: July 20, 2015Date of Patent: September 12, 2017Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kazufumi Shiozawa, Toshihide Kawachi, Masamichi Kishimoto, Nobuhiro Komine, Yoshimitsu Kato
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Publication number: 20160274470Abstract: According to one embodiment, wafer lithography equipment includes an exposure unit transferring a circuit pattern onto a wafer, a measurement unit measuring a dimension of the circuit pattern and a calculator. The calculator includes calculating a first difference. The first difference is the difference between a first dimension and a second dimension. The first dimension is obtained by substituting a first exposure amount and a first focus distance into an approximate response surface function. The second dimension is measured by the measurement unit. The calculator also includes calculating a second difference. The second difference is the sum total of the first difference for all of the circuit patterns. The calculator also includes calculating a second exposure amount and a second focus distance causing the difference between the approximate response surface function and the second difference to be a minimum. The calculator also includes calculating a correction exposure amount.Type: ApplicationFiled: July 20, 2015Publication date: September 22, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Kazufumi SHIOZAWA, Toshihide KAWACHI, Masamichi KISHIMOTO, Nobuhiro KOMINE, Yoshimitsu KATO
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Patent number: 9368413Abstract: According to one embodiment, a pattern formed through light exposure is observed under two or more different optical conditions, and a focus shift and exposure amount in the light exposure are estimated based on a brightness value of the pattern under each of the optical conditions.Type: GrantFiled: September 11, 2014Date of Patent: June 14, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Nobuhiro Komine, Yoshimitsu Kato, Kazufumi Shiozawa
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Publication number: 20160005661Abstract: According to one embodiment, a pattern formed through light exposure is observed under two or more different optical conditions, and a focus shift and exposure amount in the light exposure are estimated based on a brightness value of the pattern under each of the optical conditions.Type: ApplicationFiled: September 11, 2014Publication date: January 7, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Nobuhiro KOMINE, Yoshimitsu KATO, Kazufumi SHIOZAWA
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Patent number: 7731556Abstract: A flat panel display is provided. The flat panel display includes a cathode panel in which a plurality of electron emission areas are provided on a support, and an anode panel in which a plurality of phosphor areas and an anode electrode are provided on a substrate. The cathode panel and the anode panel are joined together at their periphery by a joining member. The anode electrode includes an anode electrode central section covering the phosphor areas, and an anode electrode peripheral section surrounding the anode electrode central section and extending from the anode electrode central section and being provided in contact with the substrate. The average thickness of the anode electrode peripheral section is smaller than the average thickness of the anode electrode central section.Type: GrantFiled: November 2, 2006Date of Patent: June 8, 2010Assignee: Sony CorporationInventors: Satoshi Okanan, Yoshimitsu Kato, Masaru Kokubukata, Keiji Honda
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Patent number: 7541731Abstract: A flat-panel display includes a cathode panel including a plurality of electron emission regions, and an anode panel including a fluorescent layer and an anode electrode, both panels being bonded together in a peripheral region and holding a vacuum space therebetween; a plurality of spacers disposed between the cathode panel and the anode panel; a high-resistance layer provided between the anode panel and each of the spacers; and a conductor layer provided on a portion of each of the spacers which contacts the cathode panel.Type: GrantFiled: August 18, 2006Date of Patent: June 2, 2009Assignee: Sony CorporationInventors: Hiroshi Sata, Satoshi Okanan, Keiji Honda, Yoshimitsu Kato, Atsushi Seki
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Patent number: 7388325Abstract: A flat-type display device is provided. The flat-type panel display includes a cathode panel having a plurality of electron emitter areas formed on a support; and an anode panel having formed on a substrate a plurality of fluorescent regions and an anode electrode covering at least the fluorescent regions, in which the cathode panel and the anode panel are joined together at their edges with a joint member in between. In the display device, the anode panel has formed on the anode electrode an electron absorbing layer for absorbing electrons from any one of the fluorescent regions and the anode electrode or both, and the anode panel has an adhesion improving layer formed between the anode electrode and the electron absorbing layer.Type: GrantFiled: October 24, 2006Date of Patent: June 17, 2008Assignee: Sony CorporationInventors: Yoshimitsu Kato, Satoshi Okanan, Keiji Honda, Masaru Kokubukata, Hiroshi Sata
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Publication number: 20080081533Abstract: A method of manufacturing an anode panel, the anode panel including a substrate, unit phosphor regions, lattice-shaped barrier ribs, anode electrode units, and a resistor layer for electrically connecting the anode electrode units to each other, the method including the steps of: obtaining the anode electrode units by forming the barrier ribs and the unit phosphor regions on the substrate, next forming a conductive material layer on an entire surface, and then removing parts of the conductive material layer which parts are situated on barrier rib top surfaces; and forming the resistor layer; wherein a step of removing the parts of the conductive material layer which parts are situated on the barrier rib top surfaces includes a step of attaching a peeling layer to the parts of the conductive material layer which parts are situated on the barrier rib top surfaces and then mechanically peeling off the peeling layer.Type: ApplicationFiled: October 15, 2007Publication date: April 3, 2008Applicant: Sony CorporationInventors: Yoshimitsu KATO, Yukinobu Iguchi, Satoshi Okanan, Yasuhito Hatano, Keiji Honda
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Publication number: 20070200486Abstract: A flat panel display is provided. The flat panel display includes a cathode panel in which a plurality of electron emission areas are provided on a support, and an anode panel in which a plurality of phosphor areas and an anode electrode are provided on a substrate. The cathode panel and the anode panel are joined together at their periphery by a joining member. The anode electrode includes an anode electrode central section covering the phosphor areas, and an anode electrode peripheral section surrounding the anode electrode central section and extending from the anode electrode central section and being provided in contact with the substrate. The average thickness of the anode electrode peripheral section is smaller than the average thickness of the anode electrode central section.Type: ApplicationFiled: November 2, 2006Publication date: August 30, 2007Applicant: Sony CorporationInventors: Satoshi Okanan, Yoshimitsu Kato, Masaru Kokubukata, Keiji Honda
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Publication number: 20070126339Abstract: A method of manufacturing an anode panel, the anode panel including a substrate, unit phosphor regions, lattice-shaped barrier ribs, anode electrode units, and a resistor layer for electrically connecting the anode electrode units to each other, the method including the steps of: obtaining the anode electrode units by forming the barrier ribs and the unit phosphor regions on the substrate, next forming a conductive material layer on an entire surface, and then removing parts of the conductive material layer which parts are situated on barrier rib top surfaces; and forming the resistor layer; wherein a step of removing the parts of the conductive material layer which parts are situated on the barrier rib top surfaces includes a step of attaching a peeling layer to the parts of the conductive material layer which parts are situated on the barrier rib top surfaces and then mechanically peeling off the peeling layer.Type: ApplicationFiled: June 22, 2006Publication date: June 7, 2007Applicant: SONY CORPORATIONInventors: Yoshimitsu Kato, Yukinobu Iguchi, Satoshi Okanan, Yasuhito Hatano, Keiji Honda
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Publication number: 20070096623Abstract: A flat-type display device is provided. The flat-type panel display includes a cathode panel having a plurality of electron emitter areas formed on a support; and an anode panel having formed on a substrate a plurality of fluorescent regions and an anode electrode covering at least the fluorescent regions, in which the cathode panel and the anode panel are joined together at their edges with a joint member in between. In the display device, the anode panel has formed on the anode electrode an electron absorbing layer for absorbing electrons from any one of the fluorescent regions and the anode electrode or both, and the anode panel has an adhesion improving layer formed between the anode electrode and the electron absorbing layer.Type: ApplicationFiled: October 24, 2006Publication date: May 3, 2007Applicant: Sony CorporationInventors: Yoshimitsu Kato, Satoshi Okanan, Keiji Honda, Masaru Kokubukata, Hiroshi Sata
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Publication number: 20070046163Abstract: A flat-panel display includes a cathode panel including a plurality of electron emission regions, and an anode panel including a fluorescent layer and an anode electrode, both panels being bonded together in a peripheral region and holding a vacuum space therebetween; a plurality of spacers disposed between the cathode panel and the anode panel; a high-resistance layer provided between the anode panel and each of the spacers; and a conductor layer provided on a portion of each of the spacers which contacts the cathode panel.Type: ApplicationFiled: August 18, 2006Publication date: March 1, 2007Inventors: Hiroshi Sata, Satoshi Okanan, Keiji Honda, Yoshimitsu Kato, Atsushi Seki
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Publication number: 20010038880Abstract: A method and an apparatus for coating interior carbon on the inner surface of cathode ray tube funnels by the flow coating process, being capable of coating the interior carbon so as to avoid adhesion thereof onto the projected portion of the anode button, and so as to ensure electrical connection between the interior carbon and the anode button will be provided. In the method, the air is spot-blown around the anode button provided inside the funnel at least when the interior carbon injected onto the inner surface of the funnel flows down to reach such anode button, to thereby prevent the interior carbon from adhering to the projected portion of such anode button.Type: ApplicationFiled: March 12, 2001Publication date: November 8, 2001Inventors: Takashi Mukuno, Yoshimitsu Kato, Takenobu Kawai, Syouichi Hamase
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Patent number: 5865939Abstract: A method of applying a film, preferably of PET, to a surface, preferably the front surface of the panel of a CRT. Resin is first applied to the surface in a predetermined pattern. The film is then pressed against a part of the surface near one edge of it by a roller. The roller is then moved across the surface to press the film onto the resin. The pressure exerted by the roller is reduced in the middle of the surface as compared with that exerted at the edge. Two different pressures may be used in the middle part.Type: GrantFiled: June 24, 1997Date of Patent: February 2, 1999Assignees: Sony Corporation, Sony United Kingdom LimitedInventors: Yasushi Tabuki, Yoichi Matsubara, Yoshimitsu Kato
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Patent number: 5783021Abstract: A method of applying a film, preferably of PET, to a surface, preferably the front surface of the panel of a CRT. Resin is first applied to the surface in a predetermined pattern. The film is then pressed against a part of the surface near one edge of it by a roller. The roller is then moved across the surface to press the film onto the resin. The pressure exerted by the roller is reduced in the middle of the surface as compared with that exerted at the edge. Two different pressures may be used in the middle part.Type: GrantFiled: March 14, 1996Date of Patent: July 21, 1998Assignees: Sony Corporation, Sony United Kingdom LimitedInventors: Yasushi Tabuki, Yoichi Matsubara, Yoshimitsu Kato
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Patent number: 5063874Abstract: An apparatus for producing a black matrix-type phosphor screen of a cathode ray tube is disclosed, which includes a carbon coating nozzle for coating a carbon slurry on a cathode ray tube panel, a tank for containing the carbon slurry, a supplying system for supplying the carbon slurry from the carbon slurry tank into the carbon coating nozzle and a collecting system for collecting excess carbon slurry produced from the carbon coating nozzle back into the carbon slurry tank, and a carbon slurry regenerating device using an ion-exchange resin is provided. The regenerating device can be placed in at least one of the supplying system, the collecting system and the carbon slurry tank.Type: GrantFiled: May 15, 1990Date of Patent: November 12, 1991Assignee: Sony CorporationInventors: Robert E. Dodds, Tsutomu Inose, Yoshimitsu Kato
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Patent number: 4939000Abstract: A method for regenerating a carbon slurry used to produce a black matrix-type phosphor screen of a cathode ray tube is disclosed, in which excess carbon slurry is collected after the completion of a carbon-coating process onto a cathode ray tube panel. This collected carbon slurry is regenerated by means of an ion-exchange resin.Type: GrantFiled: August 22, 1989Date of Patent: July 3, 1990Assignee: Sony CorporationInventors: Robert E. Dodds, Tsutomu Inose, Yoshimitsu Kato