Patents by Inventor Yoshinobu Ooya

Yoshinobu Ooya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140011363
    Abstract: A metal mask having an etching pattern having a very high verticality is formed, and an etching shape having a very high verticality is formed by etching a semiconductor with the metal mask as a mask. A resist film patterned with a reversal pattern obtained by reversing an etching pattern is formed on a semiconductor (resist film forming process, S100), a metal paste is filled in the reversal pattern of the resist film (metal paste filling process, S200), a metal mask having the etching pattern is formed by removing the resist film while baking the metal paste by a heating control (metal mask forming process, S300), and plasma etching is performed on the semiconductor by using the metal mask (etching process, S400).
    Type: Application
    Filed: June 25, 2013
    Publication date: January 9, 2014
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Ryuichi TAKASHIMA, Yoshinobu OOYA
  • Patent number: 8420547
    Abstract: A plasma processing method performed in a plasma processing apparatus including a processing chamber accommodating a substrate in which a plasma is generated; a mounting table mounting the substrate, which is provided in the processing chamber and to which a plasma attraction high frequency voltage is applied; and a facing electrode provided to face the mounting table in the processing chamber, to which a negative DC voltage is applied, the method including: applying a plasma attraction high frequency voltage to the mounting table for a predetermined period of time; and stopping the application of the plasma attraction high frequency voltage to the mounting table. In the plasma processing method, the application of the plasma attraction high frequency voltage and stopping thereof are alternately repeated.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: April 16, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Yoshinobu Ooya
  • Patent number: 8383001
    Abstract: There is provided a plasma etching method capable of achieving a sufficient organic film modifying effect by high-velocity electrons. In forming a hole in an etching target film by plasma etching, a first condition of generating plasma within a processing chamber by way of turning on a plasma-generating high frequency power application unit and a second condition of not generating the plasma within the processing chamber by way of turning off the plasma-generating high frequency power application unit are repeated alternately. Further, a negative DC voltage is applied from a first DC power supply such that an absolute value of the applied negative DC voltage during a period of the second condition is greater than an absolute value of the applied negative DC voltage during a period of the first condition.
    Type: Grant
    Filed: February 18, 2010
    Date of Patent: February 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Hiromasa Mochiki, Yoshinobu Ooya, Fumio Yamazaki, Toshio Haga
  • Publication number: 20120214313
    Abstract: There is provided a plasma processing apparatus capable of optimizing a plasma process in response to various requirements of a micro processing by effectively controlling a RF bias function. In this plasma processing apparatus, a high frequency power RFH suitable for generating plasma of a capacitively coupling type is applied to an upper electrode 48 (or lower electrode 16) from a third high frequency power supply 66, and two high frequency powers RFL1 (0.8 MHz) and RFL2 (13 MHz) suitable for attracting ions are applied to the susceptor 16 from first and second high frequency power supplies 36 and 38, respectively, in order to control energy of ions incident onto a semiconductor wafer W from the plasma. A control unit 88 controls a total power and a power ratio of the first and second high frequency powers RFL1 and RFL2 depending on specifications, conditions or recipes of an etching process.
    Type: Application
    Filed: August 22, 2011
    Publication date: August 23, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yoshinobu Ooya, Akira Tanabe, Yoshinori Yasuta
  • Publication number: 20120000886
    Abstract: The substrate processing apparatus includes a process chamber which accommodates a wafer and performs a plasma etching process on the wafer, an exhaust chamber which communicates with the process chamber, an exhaust plate which divides the process chamber from the exhaust chamber and prevents plasma inside the process chamber from leaking into the exhaust chamber, and an upper electrode plate arranged inside the exhaust chamber, wherein the exhaust plate includes a plurality of through holes, and the upper electrode plate includes a plurality of through holes, is capable of contacting the exhaust plate in parallel, and is capable of being spaced apart from the exhaust plate.
    Type: Application
    Filed: July 1, 2011
    Publication date: January 5, 2012
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Masanobu HONDA, Kazuhiro KUBOTA, Yoshinobu OOYA, Masaru NISHINO
  • Publication number: 20110272097
    Abstract: A plasma etching apparatus includes an upper electrode and a lower electrode, between which plasma of a process gas is generated to perform plasma etching on a wafer W. The apparatus further comprises a cooling ring disposed around the wafer, a correction ring disposed around the cooling ring, and a variable DC power supply directly connected to the correction ring, the DC voltage being preset to provide the correction ring with a negative bias, relative to ground potential, for attracting ions in the plasma and to increase temperature of the correction ring to compensate for a decrease in temperature of a space near the edge of the target substrate due to the cooling ring.
    Type: Application
    Filed: July 19, 2011
    Publication date: November 10, 2011
    Inventors: Akira Koshiishi, Masaru Sugimoto, Kunihiko Hinata, Noriyuki Kobayashi, Chishio Koshimizu, Ryuji Ohtani, Kazuo Kibi, Masashi Saito, Naoki Matsumoto, Yoshinobu Ooya, Manabu Iwata, Daisuke Yano, Yohei Yamazawa, Hidetoshi Hanaoka, Toshihiro Hayami, Hiroki Yamazaki, Manabu Sato
  • Patent number: 7988816
    Abstract: A plasma etching apparatus includes an upper electrode and a lower electrode, between which plasma of a process gas is generated to perform plasma etching on a wafer W. The apparatus further comprises a cooling ring disposed around the wafer, a correction ring disposed around the cooling ring, and a variable DC power supply directly connected to the correction ring, the DC voltage being preset to provide the correction ring with a negative bias, relative to ground potential, for attracting ions in the plasma and to increase temperature of the correction ring to compensate for a decrease in temperature of a space near the edge of the target substrate due to the cooling ring.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: August 2, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Akira Koshiishi, Masaru Sugimoto, Kunihiko Hinata, Noriyuki Kobayashi, Chishio Koshimizu, Ryuji Ohtani, Kazuo Kibi, Masashi Saito, Naoki Matsumoto, Yoshinobu Ooya, Manabu Iwata, Daisuke Yano, Yohei Yamazawa, Hidetoshi Hanaoka, Toshihiro Hayami, Hiroki Yamazaki, Manabu Sato
  • Publication number: 20100213162
    Abstract: There is provided a plasma etching method capable of achieving a sufficient organic film modifying effect by high-velocity electrons. In forming a hole in an etching target film by plasma etching, a first condition of generating plasma within a processing chamber by way of turning on a plasma-generating high frequency power application unit and a second condition of not generating the plasma within the processing chamber by way of turning off the plasma-generating high frequency power application unit are repeated alternately. Further, a negative DC voltage is applied from a first DC power supply such that an absolute value of the applied negative DC voltage during a period of the second condition is greater than an absolute value of the applied negative DC voltage during a period of the first condition.
    Type: Application
    Filed: February 18, 2010
    Publication date: August 26, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hiromasa Mochiki, Yoshinobu Ooya, Fumio Yamazaki, Toshio Haga
  • Publication number: 20100210114
    Abstract: A plasma processing method performed in a plasma processing apparatus including a processing chamber accommodating a substrate in which a plasma is generated; a mounting table mounting the substrate, which is provided in the processing chamber and to which a plasma attraction high frequency voltage is applied; and a facing electrode provided to face the mounting table in the processing chamber, to which a negative DC voltage is applied, the method including: applying a plasma attraction high frequency voltage to the mounting table for a predetermined period of time; and stopping the application of the plasma attraction high frequency voltage to the mounting table. In the plasma processing method, the application of the plasma attraction high frequency voltage and stopping thereof are alternately repeated.
    Type: Application
    Filed: February 17, 2010
    Publication date: August 19, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Yoshinobu OOYA
  • Publication number: 20100190350
    Abstract: A plasma etching method for forming a hole in an etching target film by a plasma processing apparatus is provided. The apparatus includes an RF power supply for applying RF power for plasma generation to at least one of upper and lower electrodes, and a DC power supply for applying minus DC voltage to the upper electrode. A first condition that plasma is generated by turning on the RF power supply and minus DC voltage is applied to the upper electrode and a second condition that the plasma is extinguished by turning off the RF power supply and minus DC voltage is applied to the upper electrode are alternately repeated. Etching is performed by positive ions in the plasma under the first condition and negative ions are supplied into the hole by the DC voltage to neutralize positive ions in the hole under the second condition.
    Type: Application
    Filed: January 25, 2010
    Publication date: July 29, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Koichi YATSUDA, Yoshinobu Ooya, Shin Okamoto, Hiromasa Mochiki
  • Publication number: 20090170335
    Abstract: A plasma etching method for performing an etching process for forming on an insulating film formed on a substrate a hole shape having a ratio of depth to opening width of more than 20. The hole shape is formed on the insulating film by converting processing gas containing at least C4F6 gas and C6F6 gas into a plasma. A flow rate ratio of the C4F6 gas to the C6F6 gas (C4F6 gas flow rate/C6F6 gas flow rate) ranges from 2 to 11.
    Type: Application
    Filed: December 22, 2008
    Publication date: July 2, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Satoshi TANAKA, Yoshinobu Ooya, Fumio Yamazaki
  • Publication number: 20060066247
    Abstract: A plasma etching apparatus includes an upper electrode and a lower electrode, between which plasma of a process gas is generated to perform plasma etching on a wafer W. The apparatus further comprises a variable DC power supply to apply a DC voltage to the upper electrode, so as to cause the absolute value of a self-bias voltage on the surface thereof to be large enough to obtain a suitable sputtering effect on the surface, and to increase the plasma sheath length on the upper electrode side to generate predetermined pressed plasma.
    Type: Application
    Filed: June 21, 2005
    Publication date: March 30, 2006
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akira Koshiishi, Masaru Sugimoto, Kunihiko Hinata, Noriyuki Kobayashi, Chishio Koshimizu, Ryuji Ohtani, Kazuo Kibi, Masashi Saito, Naoki Matsumoto, Yoshinobu Ooya, Manabu Iwata, Daisuke Yano, Yohei Yamazawa, Hidetoshi Hanaoka, Toshihiro Hayami, Hiroki Yamazaki, Manabu Sato
  • Publication number: 20050106875
    Abstract: A plasma ashing method of an object to be processed removes a resist film therefrom in a processing vessel after etching a part of a low dielectric constant film with the resist film having a pattern thereon as a mask in the processing vessel. The plasma ashing method includes a first and a second ashing processes. The first ashing process removes deposits off an inner wall of the processing vessel by using a first processing gas including at least O2 gas while controlling the pressure in the processing vessel to be smaller than or equal to 20 mTorr. The second ashing process removes the resist film by using a second processing gas including at least O2 gas.
    Type: Application
    Filed: September 24, 2004
    Publication date: May 19, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kazuhiro Kubota, Yoshiki Igarashi, Shigeru Tahara, Shin Okamoto, Toshihiko Shindo, Yoshinobu Ooya