Patents by Inventor Yoshinobu Shimokawa
Yoshinobu Shimokawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9760717Abstract: A communication device includes a memory and a processor coupled to the memory and configured to, when a first vibration is detected in the communication device, set a certain state that protects information stored in the memory, and cancel the certain state based on receiving from another communication device a notification indicating that the other communication device detected a second vibration.Type: GrantFiled: August 14, 2014Date of Patent: September 12, 2017Assignee: FUJITSU LIMITEDInventors: Yumi Sakemi, Tetsuya Izu, Yoshinobu Shimokawa, Tadashige Iwao
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Patent number: 9544155Abstract: A power supply controller includes a first port, a second port, and a controller. The first port is connected to a power supply device. The second port is connected to a first relay node device via a wired path. The controller performs control to supply power received from the power supply device from the second port to the first relay node device. The controller performs control to generate a power-on instruction frame for instructing the first relay node device started by receiving power supply to start power supply from a port included in the first relay node device to a second relay node device connected to the first relay node device via a wired path. The controller performs control to transmit the generated power-on instruction frame from the second port.Type: GrantFiled: September 2, 2014Date of Patent: January 10, 2017Assignee: FUJITSU LIMITEDInventors: Yoshinobu Shimokawa, Toshitsugu Kobayashi, Yoshiyuki Jufuku, Kensuke Kubo, Masatsugu Kawamoto
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Patent number: 9270573Abstract: A node apparatus includes a receiving unit receiving a data frame from one of adjacent nodes apparatuses; a storing unit storing an identification information management table in which frame identification information with which the data frame may be uniquely identified, and overlapped data identification information; a processor which performs a process including: judging whether or not a final destination of the received data frame is the node apparatus itself; judging whether or not a registration that matches the frame identification information of the received data frame exists in the identification information management table; judging whether or not the overlapped data identification information of the received data frame and the overlapped data identification information corresponding to the registration match; and discarding the received data frame; and performing a retransmission of the received data frame to another adjacent node that has not been a transmission destination of the data frame.Type: GrantFiled: July 15, 2014Date of Patent: February 23, 2016Assignee: FUJITSU LIMITEDInventors: Mitsuhiro Noyama, Kenji Maeda, Kazuhisa Matsumoto, Yoshinobu Shimokawa, Katsuhiko Yamatsu, Koki Mie, Yuji Higashihara
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Patent number: 9210096Abstract: A routing method performed by node equipment includes: receiving a first frame including a wait number, incrementing the wait number, and storing the incremented wait number as a local wait number; receiving a second frame including a wait number of a destination node equipment, and comparing the wait number in the second frame and the local wait number; transmitting the second frame to an adjacent node equipment having a larger wait number than the local wait number, when the wait number in the second frame is larger than the local wait number; and returning the second frame to a source node equipment of the second frame, when the wait number in the second frame is larger than the local wait number but there is no adjacent node equipment having a larger wait number than the local wait number.Type: GrantFiled: February 27, 2013Date of Patent: December 8, 2015Assignee: FUJITSU LIMITEDInventors: Yoshinobu Shimokawa, Yoshiyuki Jufuku, Yuji Kuroki, Masatsugu Kawamoto
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Publication number: 20150049759Abstract: A node apparatus includes a receiving unit receiving a data frame from one of adjacent nodes apparatuses; a storing unit storing an identification information management table in which frame identification information with which the data frame may be uniquely identified, and overlapped data identification information; a processor which performs a process including: judging whether or not a final destination of the received data frame is the node apparatus itself; judging whether or not a registration that matches the frame identification information of the received data frame exists in the identification information management table; judging whether or not the overlapped data identification information of the received data frame and the overlapped data identification information corresponding to the registration match; and discarding the received data frame; and performing a retransmission of the received data frame to another adjacent node that has not been a transmission destination of the data frame.Type: ApplicationFiled: July 15, 2014Publication date: February 19, 2015Inventors: Mitsuhiro Noyama, Kenji MAEDA, Kazuhisa Matsumoto, Yoshinobu Shimokawa, Katsuhiko Yamatsu, Koki Mie, Yuji HIGASHIHARA
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Publication number: 20140369180Abstract: A power supply controller includes a first port, a second port, and a controller. The first port is connected to a power supply device. The second port is connected to a first relay node device via a wired path. The controller performs control to supply power received from the power supply device from the second port to the first relay node device. The controller performs control to generate a power-on instruction frame for instructing the first relay node device started by receiving power supply to start power supply from a port included in the first relay node device to a second relay node device connected to the first relay node device via a wired path. The controller performs control to transmit the generated power-on instruction frame from the second port.Type: ApplicationFiled: September 2, 2014Publication date: December 18, 2014Inventors: Yoshinobu Shimokawa, Toshitsugu Kobayashi, YOSHIYUKI JUFUKU, Kensuke Kubo, MASATSUGU KAWAMOTO
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Publication number: 20140351950Abstract: A communication device includes a memory and a processor coupled to the memory and configured to, when a first vibration is detected in the communication device, set a certain state that protects information stored in the memory, and cancel the certain state based on receiving from another communication device a notification indicating that the other communication device detected a second vibration.Type: ApplicationFiled: August 14, 2014Publication date: November 27, 2014Applicant: FUJITSU LIMITEDInventors: Yumi Sakemi, Tetsuya Izu, Yoshinobu Shimokawa, Tadashige IWAO
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Publication number: 20140204728Abstract: A node equipment includes a receiver, a processor, a memory and a transmitter. The node equipment is relayed by a plurality of relay devices with a server. The receiver receives a frame from adjacent node equipment. The processor generates a wait number by incrementing a number of hops for each of the relay devices, when the number of hops to the adjacent node equipment is reported with a synchronization request, the number of hops being generated by designating each of the plurality of relay devices as a starting point. The memory stores the wait number in association with an identifier of the relay device. The transmitter transmits a data frame in which the server is designated as an address. The processor outputs to the transmitter a data frame in which a relay device having a relatively small wait number stored in the memory is designated as a relay destination.Type: ApplicationFiled: March 19, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventors: Toshitsugu Kobayashi, Yoshinobu Shimokawa, Satoshi Hamanaka, SYOICHI URATA, Kenji MAEDA, YOSHIYUKI JUFUKU, Yasunori Murata, YUZURU SHIMOMURA
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Patent number: 8396504Abstract: A mobile terminal device communicates with a base station in one of a power-saving state in which consumption of power supplied from a built-in power supply is suppressed and a normal state in which the consumption of power supplied from the built-in power supply is not suppressed. The mobile terminal device includes a base station detecting unit that detects a maximum-power received-wave base station of which a received-wave power is maximum, a base-station-change detecting unit that detects whether the maximum-power received-wave base station detected by the base station detecting unit is changed, and a power-saving-state transition control unit that controls transition to the power-saving state when the change of the maximum-power received-wave base station is not detected by the base-station-change detecting unit in a predetermined time in the normal state.Type: GrantFiled: September 21, 2010Date of Patent: March 12, 2013Assignee: Fujitsu LimitedInventors: Takanori Choumaru, Kouki Shigaki, Yoshinobu Shimokawa, Yoshiyuki Jufuku
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Publication number: 20110009155Abstract: A mobile terminal device communicates with a base station in one of a power-saving state in which consumption of power supplied from a built-in power supply is suppressed and a normal state in which the consumption of power supplied from the built-in power supply is not suppressed. The mobile terminal device includes a base station detecting unit that detects a maximum-power received-wave base station of which a received-wave power is maximum, a base-station-change detecting unit that detects whether the maximum-power received-wave base station detected by the base station detecting unit is changed, and a power-saving-state transition control unit that controls transition to the power-saving state when the change of the maximum-power received-wave base station is not detected by the base-station-change detecting unit in a predetermined time in the normal state.Type: ApplicationFiled: September 21, 2010Publication date: January 13, 2011Applicant: FUJITSU LIMITEDInventors: Takanori CHOUMARU, Kouki SHIGAKI, Yoshinobu SHIMOKAWA, Yoshiyuki JUFUKU
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Publication number: 20080140950Abstract: A buffer has a capacity of an integral multiple of the number of transferred bits (i.e., the number of data bits transferred at electrically the same timing) between the buffer and a recording medium and between the buffer and a controller. Data transfer is performed between the buffer and the recording medium and between the controller and the buffer by the number of transferred bits in parallel. The number of data outputs (inputs) at the buffer is counted. When the count reaches a number obtained by division of one sector by the number of transferred bits, the output (input) of one-sector data to the recording medium is counted. The counted number of sectors and the number of sectors input (output) from the buffer to the recording medium are compared, and it is determined whether the data transfer is performed correctly.Type: ApplicationFiled: October 11, 2007Publication date: June 12, 2008Applicant: FUJITSU LIMITEDInventors: Yoshiyuki Jufuku, Masayuki Furuta, Yoshinobu Shimokawa