Abstract: The digital filter has a first-stage decimation filter and a second-stage decimation filter. The second-stage decimation filter has a shifter that performs shift operation on a filter coefficient, a complementer that performs complementary operation on the filter coefficient, a reset circuit that resetting the filter coefficient, and an adder that adds values selected from the filter coefficient, a shift operation result from the shifter, and a complementary operation result from the complementer.

Abstract: The digital filter has a first-stage decimation filter and a second-stage decimation filter. The second-stage decimation filter has a shifter that performs shift operation on a filter coefficient, a complementer that performs complementary operation on the filter coefficient, a reset circuit that resetting the filter coefficient, and an adder that adds values selected from the filter coefficient, a shift operation result from the shifter, and a complementary operation result from the complementer.

Abstract: A delay circuit for a ring oscillator includes a first electric potential line, a pair of output lines, a pair of two first transistors arranged between the first electric potential line and the pair of output lines, respectively, a second electric potential line, and a pair of two second transistors arranged between the second electric potential line and the pair of output lines, respectively. Respective gates of the first transistors are connected to the pair of output lines, respectively, the first transistors, and the second transistors are connected to each other center-symmetrically, and the output lines are connected to a third electric potential line. Such a circuit can easily realize a differential gain of more than or equal to 1 and an in-phase gain of less than or equal to 1.