Patents by Inventor Yoshinori Hagio

Yoshinori Hagio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9941177
    Abstract: A pattern accuracy detecting apparatus includes a stage for supporting a substrate, an optical warpage detecting unit that measures a shape of a substrate disposed on the stage, an optical pattern detection unit that detects a position of a pattern on the substrate, and a processing unit that corrects the detected pattern position based on the measured shape of the substrate.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: April 10, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Kentaro Kasa, Kazuya Fukuhara, Kazutaka Ishigo, Manabu Takakuwa, Yoshinori Hagio, Kazuhiro Segawa, Yuki Murasaka, Tetsuya Kugimiya, Yuu Yamayose, Yosuke Okamoto
  • Publication number: 20170271214
    Abstract: A pattern accuracy detecting apparatus includes a stage for supporting a substrate, an optical warpage detecting unit that measures a shape of a substrate disposed on the stage, an optical pattern detection unit that detects a position of a pattern on the substrate, and a processing unit that corrects the detected pattern position based on the measured shape of the substrate.
    Type: Application
    Filed: August 31, 2016
    Publication date: September 21, 2017
    Inventors: Kentaro KASA, Kazuya FUKUHARA, Kazutaka ISHIGO, Manabu TAKAKUWA, Yoshinori HAGIO, Kazuhiro SEGAWA, Yuki MURASAKA, Tetsuya KUGIMIYA, Yuu YAMAYOSE, Yosuke OKAMOTO
  • Publication number: 20160379902
    Abstract: A measurement apparatus according to an embodiment includes an electron emission unit and a detection unit that detects a reflection electron reflected by a recessed shape pattern. In addition, the measurement apparatus includes a time measurement unit that measures a response time from when the electron beam is emitted to when the reflection electron is detected. Further, the measurement apparatus includes a bent amount calculation unit that calculates the amount of bent, i.e., a position deviation amount, between an upper surface portion and a bottom surface portion of the recessed shape pattern. The bent amount calculation unit calculates the amount of bent on the basis of a condition for determining the incidence path of the electron beam to the recessed shape pattern, and the response time.
    Type: Application
    Filed: September 9, 2015
    Publication date: December 29, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yoshinori HAGIO, Nobuhiro KOMINE
  • Patent number: 9502357
    Abstract: According to one embodiment, at first, a first pattern is formed to an insulating film. Then, a first transparent film is formed on a region of the insulating film, which includes a position where the first pattern is formed. Thereafter, an opaque film which is opaque to light within a visible light region is formed on an entire surface of the insulating film. Then, a second transparent film is generated by selectively oxidizing part of the opaque film in contact with the first transparent film.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: November 22, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshinori Hagio
  • Patent number: 9469313
    Abstract: A bogie frame for railway vehicles includes a pair of left and right side frames disposed along a direction of rails and a cross frame that connects the side frames to each other, and the cross frame includes a top plate member, a bottom plate member, and a pair of front and rear side plate members that are disposed between these plate members and welded thereto, wherein the cross frame has mounting bracket support portions that extend from front and rear edges of the top plate member and the bottom plate member, correspondingly to locations where mounting brackets for mounting a traction motor and mounting brackets for mounting a gearbox are disposed, and the mounting brackets are welded to the mounting bracket support portions. This makes it possible to achieve good welding workability for assembling the bogie frame.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: October 18, 2016
    Assignee: NIPPON STEEL & SUMITOMO METAL CORPORATION
    Inventors: Yoshinori Hagio, Masanori Sawada, Satoshi Tokunaga, Kazuhiko Futagawa
  • Publication number: 20160268211
    Abstract: According to one embodiment, at first, a first pattern is formed to an insulating film. Then, a first transparent film is formed on a region of the insulating film, which includes a position where the first pattern is formed. Thereafter, an opaque film which is opaque to light within a visible light region is formed on an entire surface of the insulating film. Then, a second transparent film is generated by selectively oxidizing part of the opaque film in contact with the first transparent film.
    Type: Application
    Filed: July 15, 2015
    Publication date: September 15, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoshinori HAGIO
  • Publication number: 20160043037
    Abstract: According to one embodiment, there is provided a mark comprising a first mark pattern, a second mark pattern, and an opening pattern. The first mark pattern is arranged in a lower layer of a semiconductor wafer that includes a substrate, the lower layer, an intermediate layer, and an upper layer. The second mark pattern is arranged in the upper layer. The opening pattern exposes the first mark pattern.
    Type: Application
    Filed: December 23, 2014
    Publication date: February 11, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shinichi NAKAGAWA, Nobuhiro KOMINE, Yoshinori HAGIO, Kentaro KASA
  • Patent number: 9244365
    Abstract: According to one embodiment, a method for measuring pattern misalignment, includes: a first step obtaining image data; a second step specifying a measurement region; a third step calculating a first shift amount (x1, y1); a fourth step determining, after calculating the first shift amount, a first distribution; a fifth step executing a plurality of times the second step, the third step, and the fourth step; a seventh step calculating a second shift amount (x2, y2); an eighth step determining, after calculating the second shift amount, a second distribution; a ninth step executing a plurality of times the sixth step, the seventh step, and the eighth step; and a tenth step calculating a difference (x2?x1, y2?y1) between the second pattern misalignment and the first pattern misalignment.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: January 26, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Okamoto, Yoshinori Hagio
  • Patent number: 9146458
    Abstract: An EUV exposure apparatus according to embodiments includes a reticle stage which suctions a rear surface side of an EUV mask to retain the EUV mask. In addition, the EUV exposure apparatus includes a detection unit which detects a position of a measurement mark formed on the rear surface of the EUV mask in the state where the EUV mask is suctioned on the reticle stage. In addition, the EUV exposure apparatus includes a control unit which calculates a distortion amount of the EUV mask based on the position of the measurement mark and performs exposure control on a wafer while correcting the distortion amount.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 29, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshinori Hagio, Yosuke Okamoto
  • Patent number: 9136224
    Abstract: According to one embodiment, an alignment mark provided on an underlayer includes a plurality of first guide pattern features, and a first self-assembled film. The first guide pattern features extend in a first direction and are aligned in a second direction crossing the first direction. The first self-assembled film is provided between adjacent ones of the first guide pattern features and includes a plurality of first line pattern features and a second line pattern feature. The first line pattern features extends in the first direction, is aligned in the second direction, and has a pitch in the second direction narrower than a pitch in the second direction of the first guide pattern features. The second line pattern feature is provided between adjacent ones of the first line pattern features and extends in the first direction.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: September 15, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshinori Hagio
  • Publication number: 20150151768
    Abstract: A bogie frame for railway vehicles includes a pair of left and right side frames disposed along a direction of rails and a cross frame that connects the side frames to each other, and the cross frame includes a top plate member, a bottom plate member, and a pair of front and rear side plate members that are disposed between these plate members and welded thereto, wherein the cross frame has mounting bracket support portions that extend from front and rear edges of the top plate member and the bottom plate member, correspondingly to locations where mounting brackets for mounting a traction motor and mounting brackets for mounting a gearbox are disposed, and the mounting brackets are welded to the mounting bracket support portions. This makes it possible to achieve good welding workability for assembling the bogie frame.
    Type: Application
    Filed: April 30, 2013
    Publication date: June 4, 2015
    Inventors: Yoshinori Hagio, Masanori Sawada, Satoshi Tokunaga, Kazuhiko Futagawa
  • Publication number: 20150008598
    Abstract: According to one embodiment, an alignment mark provided on an underlayer includes a plurality of first guide pattern features, and a first self-assembled film. The first guide pattern features extend in a first direction and are aligned in a second direction crossing the first direction. The first self-assembled film is provided between adjacent ones of the first guide pattern features and includes a plurality of first line pattern features and a second line pattern feature. The first line pattern features extends in the first direction, is aligned in the second direction, and has a pitch in the second direction narrower than a pitch in the second direction of the first guide pattern features. The second line pattern feature is provided between adjacent ones of the first line pattern features and extends in the first direction.
    Type: Application
    Filed: January 10, 2014
    Publication date: January 8, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoshinori HAGIO
  • Patent number: 8859167
    Abstract: According to one embodiment, a positional deviation measuring method includes measuring a positional deviation of a device pattern formed in a lower layer portion using an alignment mark of the lower layer portion as a reference; measuring a positional deviation of a device pattern formed in an upper layer portion above the lower layer portion using an alignment mark of the upper layer portion as a reference; measuring a positional deviation between the alignment mark of the lower layer portion and the alignment mark of the upper layer portion; and calculating a positional deviation between the device patterns based on the positional deviation between the alignment marks.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: October 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshinori Hagio, Yosuke Okamoto
  • Publication number: 20140285652
    Abstract: According to one embodiment, a method for measuring pattern misalignment, includes: a first step obtaining image data; a second step specifying a measurement region; a third step calculating a first shift amount (x1, y1); a fourth step determining, after calculating the first shift amount, a first distribution; a fifth step executing a plurality of times the second step, the third step, and the fourth step; a seventh step calculating a second shift amount (x2, y2); an eighth step determining, after calculating the second shift amount, a second distribution; a ninth step executing a plurality of times the sixth step, the seventh step, and the eighth step; and a tenth step calculating a difference (x2?x1, y2?y1) between the second pattern misalignment and the first pattern misalignment.
    Type: Application
    Filed: July 29, 2013
    Publication date: September 25, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yosuke OKAMOTO, Yoshinori Hagio
  • Publication number: 20140192335
    Abstract: An EUV exposure apparatus according to embodiments includes a reticle stage which suctions a rear surface side of an EUV mask to retain the EUV mask. In addition, the EUV exposure apparatus includes a detection unit which detects a position of a measurement mark formed on the rear surface of the EUV mask in the state where the EUV mask is suctioned on the reticle stage. In addition, the EUV exposure apparatus includes a control unit which calculates a distortion amount of the EUV mask based on the position of the measurement mark and performs exposure control on a wafer while correcting the distortion amount.
    Type: Application
    Filed: March 13, 2013
    Publication date: July 10, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshinori HAGIO, Yosuke OKAMOTO
  • Publication number: 20140065522
    Abstract: According to one embodiment, a positional deviation measuring method includes measuring a positional deviation of a device pattern formed in a lower layer portion using an alignment mark of the lower layer portion as a reference; measuring a positional deviation of a device pattern formed in an upper layer portion above the lower layer portion using an alignment mark of the upper layer portion as a reference; measuring a positional deviation between the alignment mark of the lower layer portion and the alignment mark of the upper layer portion; and calculating a positional deviation between the device patterns based on the positional deviation between the alignment marks.
    Type: Application
    Filed: December 21, 2012
    Publication date: March 6, 2014
    Inventors: Yoshinori HAGIO, Yosuke Okamoto
  • Patent number: 7454831
    Abstract: An electronic element (a semiconductor chip) is joining on a wiring board with the active surface thereof facing up (die-bonding step). A slope linked from the surface of the wiring board to the active surface of the electronic element is formed at the periphery of the electronic element (slope forming step). Metallic wiring for connecting electrode terminals on the active surface to wiring patterns on the wiring board is formed on the surface of the slope by a droplet ejection method (metallic wiring forming step). In the invention, prior to forming the metallic wiring, an organic insulating membrane formed of epoxy resin or urethane resin is formed on the active surface of the electronic element, on which the corresponding metallic wiring is formed (insulative ink processing step), thereby improving adhesivity.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: November 25, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Hirofumi Kurosawa, Yoshinori Hagio
  • Publication number: 20070210458
    Abstract: A semiconductor device includes a base plate including a plurality of terminals; a semiconductor chip, mounted above the base plate, including a plurality of pads arranged on a face of the semiconductor chip; an insulating slope member, disposed around the semiconductor chip, covering steps between the semiconductor chip and the base plate; and a wiring pattern extending on the insulating slope member to electrically connect the terminals to the pads. The base plate has a base-side retaining section for retaining the insulating slope member.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 13, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Yoshinori HAGIO
  • Publication number: 20060103788
    Abstract: An electronic element (a semiconductor chip) is joining on a wiring board with the active surface thereof facing up (die-bonding step). A slope linked from the surface of the wiring board to the active surface of the electronic element is formed at the periphery of the electronic element (slope forming step). Metallic wiring for connecting electrode terminals on the active surface to wiring patterns on the wiring board is formed on the surface of the slope by a droplet ejection method (metallic wiring forming step). In the invention, prior to forming the metallic wiring, an organic insulating membrane formed of epoxy resin or urethane resin is formed on the active surface of the electronic element, on which the corresponding metallic wiring is formed (insulative ink processing step), thereby improving adhesivity.
    Type: Application
    Filed: November 8, 2005
    Publication date: May 18, 2006
    Inventors: Hirofumi Kurosawa, Yoshinori Hagio