Patents by Inventor Yoshinori Higami

Yoshinori Higami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7084503
    Abstract: The present invention provides a semiconductor device in which occurrence of disclination caused by steps in a contact portion and steps between pixel electrodes is prevented. A method of fabricating a semiconductor device according to the invention includes forming an insulating film 2 on an electrode 1a so as to cover the electrode; forming contact holes 2a and 2b located on the electrode and concave portions 2c and 2d connected to the contact hole; embedding a conductive film 8 in the contact hole and the concave portion and forming a conductive film 8 on the insulating film; and applying the CMP polishing or the etching-back to the conductive film, and thereby forming a pixel electrode made of the conductive films 8a and 8b embedded in the contact hole and the concave portion.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: August 1, 2006
    Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki Kaisha
    Inventors: Akira Ishikawa, Shingo Eguchi, Seiji Oda, Yoshinori Higami
  • Patent number: 7075594
    Abstract: A liquid crystal display device includes an active matrix substrate; a counter substrate; and a liquid crystal layer interposed between the active matrix substrate and the counter substrate. The active matrix substrate includes a plate; a thin film transistor provided on the plate; and a side light shielding layer for covering at least a portion of a side surface of the thin film transistor.
    Type: Grant
    Filed: July 8, 2003
    Date of Patent: July 11, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Ueda, Kazuhiko Inoguchi, Yoshinori Higami
  • Patent number: 6927809
    Abstract: The active matrix substrate of the invention includes: a storage capacitor formed on a board; a first insulating layer formed on the storage capacitor; a semiconductor layer formed above the storage capacitor via the first insulating layer: a gate insulating layer formed on the semiconductor layer; a gate electrode layer including a gate electrode formed above the semiconductor layer via the gate insulating layer; a second insulating layer covering the gate electrode layer and the semiconductor layer; a first light-shielding layer formed above the semiconductor layer via the second insulating layer to cover at least a channel region of the semiconductor layer; a third insulating layer formed on the first light-shielding layer; a source electrode layer including source and drain electrodes formed on the third insulating layer; a fourth insulating layer formed on the source electrode layer; and a pixel electrode formed on the fourth insulating layer and electrically connected to the drain electrode.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: August 9, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahito Gotoh, Tohru Ueda, Yoshinori Higami
  • Publication number: 20040257489
    Abstract: The active matrix substrate of the invention includes: a storage capacitor formed on a board; a first insulating layer formed on the storage capacitor; a semiconductor layer formed above the storage capacitor via the first insulating layer: a gate insulating layer formed on the semiconductor layer; a gate electrode layer including a gate electrode formed above the semiconductor layer via the gate insulating layer; a second insulating layer covering the gate electrode layer and the semiconductor layer; a first light-shielding layer formed above the semiconductor layer via the second insulating layer to cover at least a channel region of the semiconductor layer; a third insulating layer formed on the first light-shielding layer; a source electrode layer including source and drain electrodes formed on the third insulating layer; a fourth insulating layer formed on the source electrode layer; and a pixel electrode formed on the fourth insulating layer and electrically connected to the drain electrode.
    Type: Application
    Filed: October 27, 2003
    Publication date: December 23, 2004
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masahito Gotoh, Tohru Ueda, Yoshinori Higami
  • Publication number: 20040092059
    Abstract: The present invention provides a semiconductor device in which occurrence of disclination caused by steps in a contact portion and steps between pixel electrodes is prevented. A method of fabricating a semiconductor device according to the invention includes forming an insulating film 2 on an electrode 1a so as to cover the electrode; forming contact holes 2a and 2b located on the electrode and concave portions 2c and 2d connected to the contact hole; embedding a conductive film 8 in the contact hole and the concave portion and forming a conductive film 8 on the insulating film; and applying the CMP polishing or the etching-back to the conductive film, and thereby forming a pixel electrode made of the conductive films 8a and 8b embedded in the contact hole and the concave portion.
    Type: Application
    Filed: October 31, 2003
    Publication date: May 13, 2004
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akira Ishikawa, Shingo Eguchi, Seiji Oda, Yoshinori Higami
  • Patent number: 6714266
    Abstract: In a transmission type liquid crystal display device, a semiconductor thin film is formed for each pixel below a signal wiring, a gate wiring, an auxiliary capacitance wiring and a lead electrode which are made of a light shading material via an insulating film. A region that belongs to the semiconductor thin film and is located below the signal wiring and below the gate wiring is made to serve as a channel region of a TFT. Regions that belong to the semiconductor thin film and are located on both sides of the channel region below the signal wiring are made to serve as a source region and a drain region of the TFT, respectively. Further, a region that belongs to the semiconductor thin film and is located below the auxiliary capacitance wiring is made to serve as an auxiliary capacitance electrode region.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: March 30, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Ueda, Yoshinori Higami
  • Publication number: 20040008295
    Abstract: A liquid crystal display device includes an active matrix substrate; a counter substrate; and a liquid crystal layer interposed between the active matrix substrate and the counter substrate. The active matrix substrate includes a plate; a thin film transistor provided on the plate; and a side light shielding layer for covering at least a portion of a side surface of the thin film transistor.
    Type: Application
    Filed: July 8, 2003
    Publication date: January 15, 2004
    Inventors: Tohru Ueda, Kazuhiko Inoguchi, Yoshinori Higami
  • Patent number: 6337259
    Abstract: An amorphous silicon film is deposited on a quartz substrate, and a metal of Ni is introduced into the amorphous silicon film so that the amorphous silicon film is crystallized. Phosphorus is ion-implanted with an oxide pattern used as a mask. A heating process is performed in a nitrogen atmosphere, by which Ni is gettered. A heating process is performed in an O2 atmosphere, by which Ni is gettered into the oxide. Like this, by performing the first gettering in a non-oxidative atmosphere, the Ni concentration can be reduced to such a level that oxidation does not cause any increase of irregularities or occurrence of pinholes. Thus, in a second gettering, enough oxidation can be effected without minding any increase of irregularities and occurrence of pinholes, so that the Ni concentration can be reduced to an extremely low level. Also, a high-quality crystalline silicon film free from surface irregularities and pinholes can be obtained.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: January 8, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Ueda, Yasumori Fukushima, Yoshinori Higami