Abstract: A semiconductor device includes a first reference cell used for programming or reading non-volatile memory cells, and an adjustment circuit adjusting a first reference level of the first reference cell when the first reference level is changed.

Abstract: A semiconductor device includes a first reference cell used for programming or reading non-volatile memory cells, and an adjustment circuit adjusting a first reference level of the first reference cell when the first reference level is changed.

Abstract: A semiconductor device includes a first reference cell used for programming or reading non-volatile memory cells, and an adjustment circuit adjusting a first reference level of the first reference cell when the first reference level is changed.

Abstract: A semiconductor device includes a first reference cell used for programming or reading non-volatile memory cells, and an adjustment circuit adjusting a first reference level of the first reference cell when the first reference level is changed.

Abstract: A semiconductor device includes an array of memory cells, a reference circuit determining a reference level by using a reference cell, and a comparator circuit comparing data of the memory cells with the reference level, and the reference circuit comprising a circuit part that is connected to the reference cell and shifts the reference level. The circuit part includes a diode connected to a source of the reference cell and a switch transistor that is connected in parallel with the diode and is turned on/off. It is therefore possible to realize multiple threshold voltages with the use of one transistor for the reference cell, by shifting the threshold voltage of the reference cell.

Abstract: A semiconductor device includes an array of memory cells, a reference circuit determining a reference level by using a reference cell, and a comparator circuit comparing data of the memory cells with the reference level, and the reference circuit comprising a circuit part that is connected to the reference cell and shifts the reference level. The circuit part includes a diode connected to a source of the reference cell and a switch transistor that is connected in parallel with the diode and is turned on/off. It is therefore possible to realize multiple threshold voltages with the use of one transistor for the reference cell, by shifting the threshold voltage of the reference cell.

Abstract: An object of the present invention is to provide a semiconductor memory device having a function to efficiently limit a voltage amplitude of an I/O line pair 4 to protect cell data from destruction even when multiple selection, etc., occurs at a column gate 3. A semiconductor memory device 1 constituted by DRAM, etc., for transferring cell data amplified by a sense amplifier 2 to an I/O line pair 4 through a transfer gate 3, comprises an amplitude limiting means 5 for limiting the amplitude of a voltage, provided to the I/O line pair 4 in activation, wherein the amplitude limiting means 5 includes a first amplitude limiting circuit 51 having a predetermined operating range and a second amplitude limiting circuit 52 having an operating range different from the operating range of the first amplitude limiting circuit 51.

Abstract: In a semiconductor integrated device having floating voltage portion pairs, a signal line crossing over or under the floating voltage portion pairs, and a non-floating voltage portion, a noise source equivalent to the signal line is provided between the floating voltage pairs and the non-floating voltage portion.