Patents by Inventor Yoshinori Konishi

Yoshinori Konishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140355886
    Abstract: An image matching method performed by an image matching device, includes acquiring a model image, generating a plurality of variation images by applying to the model image variations that are different from each other, extracting features from each of the plurality of variation images, generating a model template based on the features, and performing template matching using an image to be matched and the model template.
    Type: Application
    Filed: May 9, 2014
    Publication date: December 4, 2014
    Applicant: OMRON CORPORATION
    Inventor: Yoshinori Konishi
  • Patent number: 8654073
    Abstract: A game apparatus calculates a first evaluation value based on the difference between the time when the load value detected by a load controller becomes the maximum and the time when the velocity of the center of gravity, which represents the velocity of movement of the position of the center of gravity, becomes the maximum. The game apparatus calculates a second evaluation value based on the velocity of load, which represents the degree of increase in the load in a predetermined time period, and the velocity of the center of gravity. The game apparatus calculates a third evaluation value based on the path of the position of the center of gravity. The game apparatus calculates the amount of slice based on the first through third evaluation values.
    Type: Grant
    Filed: December 7, 2009
    Date of Patent: February 18, 2014
    Assignee: Nintendo Co., Ltd.
    Inventor: Yoshinori Konishi
  • Patent number: 8482519
    Abstract: A game apparatus includes a CPU, and the CPU judges a motion of a player on the basis of a cycle of a load value input from a load controller, and selectively displays an animation of a player object according to the motion in a case that the motion by the player is a large-flapping motion, the CPU changes an updating velocity of an animation frame according to an arm-raising motion and arm-lowering motion of the large flapping motion. On the other hand, in a case that the motion by the player is a small-flapping motion, the CPU changes the updating velocity of the animation frame according to only the arm-lowering motion of the small-flapping motion. Thus, the motion of the player and the animation are synchronized.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: July 9, 2013
    Assignee: Nintendo Co., Ltd.
    Inventor: Yoshinori Konishi
  • Publication number: 20110074665
    Abstract: A game apparatus calculates a first evaluation value based on the difference between the time when the load value detected by a load controller becomes the maximum and the time when the velocity of the center of gravity, which represents the velocity of movement of the position of the center of gravity, becomes the maximum. The game apparatus calculates a second evaluation value based on the velocity of load, which represents the degree of increase in the load in a predetermined time period, and the velocity of the center of gravity. The game apparatus calculates a third evaluation value based on the path of the position of the center of gravity. The game apparatus calculates the amount of slice based on the first through third evaluation values.
    Type: Application
    Filed: December 7, 2009
    Publication date: March 31, 2011
    Applicant: NINTENDO CO., LTD.
    Inventor: Yoshinori KONISHI
  • Publication number: 20110069003
    Abstract: A game apparatus includes a CPU, and the CPU judges a motion of a player on the basis of a cycle of a load value input from a load controller, and selectively displays an animation of a player object according to the motion in a case that the motion by the player is a large-flapping motion, the CPU changes an updating velocity of an animation frame according to an arm-raising motion and arm-lowering motion of the large flapping motion. On the other hand, in a case that the motion by the player is a small-flapping motion, the CPU changes the updating velocity of the animation frame according to only the arm-lowering motion of the small-flapping motion. Thus, the motion of the player and the animation are synchronized.
    Type: Application
    Filed: December 4, 2009
    Publication date: March 24, 2011
    Applicant: NINTENDO CO., LTD.
    Inventor: Yoshinori Konishi
  • Publication number: 20110070953
    Abstract: A game apparatus includes a CPU, the CPU judges a motion of a player on the basis of a cycle of a load value input from a load controller, and selectively displays an animation of a player object according to the motion. The CPU detects a weight ratio based on the load value of the player every certain length of time to judge whether or not a current weight ratio is equal to or more than a previous weight ratio by a certain value or more. When the weight ratio declines, in a case that the current weight ratio is equal to or more than the previous weight ratio by a certain value or more, a both-arm-raising motion of a flapping motion to be performed by a player is detected. Furthermore, in a case that the weight ratio is less than a predetermined threshold value, a both-arm-lowering motion of the flapping motion to be performed by the player is detected. An updating velocity of an animation frame is controlled according to each motion.
    Type: Application
    Filed: December 8, 2009
    Publication date: March 24, 2011
    Applicant: NINTENDO CO., LTD.
    Inventor: Yoshinori KONISHI
  • Publication number: 20100283723
    Abstract: A game apparatus includes a CPU, the CPU judges a motion of a player on the basis of a cycle of a load value input from a load controller, and selectively displays an animation of a player object according to the motion. Furthermore, the CPU controls a moving amount or a moving velocity of the player object on the basis of the load value input from the load controller, and controls a moving direction of the player object according to a barycentric position of the player detected by the load controller.
    Type: Application
    Filed: December 4, 2009
    Publication date: November 11, 2010
    Applicant: NINTENDO CO., LTD.
    Inventor: Yoshinori KONISHI
  • Patent number: 7259409
    Abstract: A thin film device includes a metal sulfide layer formed on a single crystal silicon substrate by epitaxial growth; and a compound thin film with ionic bonding, which is formed on the metal sulfide layer by epitaxial growth. Alternatively, a thin film device includes a metal sulfide layer formed on a single crystal silicon substrate by epitaxial growth; and at least two compound thin films with ionic bonding, which are formed on the metal sulfide layer by epitaxial growth. For example, (11 20) surface AlN/MnS/Si (100) thin films formed by successively stacking a MnS layer (about 50 nm thick) and an AlN layer (about 1000 nm thick) on a single crystal Si (100) substrate, are used as a substrate, and a (11 20) surface GaN layer (about 100 nm thick) operating as a light emitting layer is formed on the substrate, thereby fabricating a thin film device.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: August 21, 2007
    Assignee: Tokyo Institute of Technology
    Inventors: Hideomi Koinuma, Jeong-Hwan Song, Toyohiro Chikyo, Young Zo Yoo, Parhat Ahmet, Yoshinori Konishi, Yoshiyuki Yonezawa
  • Publication number: 20050179034
    Abstract: The invention provides a thin film device where ionic crystals are epitaxially grown on a Si single crystal substrate through a proper buffer layer, and its for fabrication method. A ZnS layer is first deposited on a Si single crystal substrate. Ionic crystal thin films (an n-GaN layer, a GaN layer, and a p-GaN layer) are deposited thereon. The ZnS thin film is an oriented film excellent in crystallinity and has excellent surface flatness. When ZnS can be once epitaxially grown on the Si single crystal substrate, the ionic crystal thin films can be easily epitaxially grown subsequently. Therefore, ZnS is formed to be a buffer layer, whereby even ionic crystals having differences in lattice constants from Si can be easily epitaxially grown in an epitaxial thin film with few lattice defects on the Si single crystal substrate. The characteristics of a thin film device utilizing it can be enhanced.
    Type: Application
    Filed: April 4, 2005
    Publication date: August 18, 2005
    Applicants: National Institute for Materials Science, Tokyo Institute of Technology, Fuji Electric Corporate Research and Development, Ltd.
    Inventors: Toyohiro Chikyow, Hideomi Koinuma, Masashi Kawasaki, Yoo Zo, Yoshinori Konishi, Yoshiyuki Yonezawa
  • Patent number: 6888156
    Abstract: The invention provides a thin film device where ionic crystals are epitaxially grown on a Si single crystal substrate through a proper buffer layer, and its for fabrication method. A ZnS layer is first deposited on a Si single crystal substrate. Ionic crystal thin films (an n-GaN layer, a GaN layer, and a p-GaN layer) are deposited thereon. The ZnS thin film is an oriented film excellent in crystallinity and has excellent surface flatness. When ZnS can be once epitaxially grown on the Si single crystal substrate, the ionic crystal thin films can be easily epitaxially grown subsequently. Therefore, ZnS is formed to be a buffer layer, whereby even ionic crystals having differences in lattice constants from Si can be easily epitaxially grown in an epitaxial thin film with few lattice defects on the Si single crystal substrate. The characteristics of a thin film device utilizing it can be enhanced.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: May 3, 2005
    Assignees: National Institute for Materials Science, Tokyo Institute of Technology, Fuji Electric Corporate Research & Development, Ltd.
    Inventors: Toyohiro Chikyow, Hideomi Koinuma, Masashi Kawasaki, Yoo Young Zo, Yoshinori Konishi, Yoshiyuki Yonezawa
  • Patent number: 6855972
    Abstract: A composite integrated circuit is characterized in that to put an oxide thin film into practical use as an electronic device, a highly crystalline oxide thin film is grown on a silicon substrate. A MOS circuit and a thin film capacitor are formed independently, and the two substrates are laminated using an epoxy resin. They are connected through buried wiring, thereby constituting a composite circuit package. As a second substrate 1a, a (110) plane orientation silicon substrate is used which differs from the IC substrate with a (100) plane. On the (110) silicon substrate after the termination processing, a dielectric layer is film deposited, followed by forming an upper electrode, and by forming a thin film coil. Insulating magnetic gel is filled between coil wires and its upper portion. Thus, the fabrication process of the thin film coil and the composite integrated circuit is completed.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: February 15, 2005
    Assignees: National Institute for Materials Science, Tokyo Institute of Technology, Fuji Electric Corporate Research and Development
    Inventors: Hideomi Koinuma, Masashi Kawasaki, Toyohiro Chikyow, Yoshiyuki Yonezawa, Yoshinori Konishi
  • Publication number: 20040159854
    Abstract: A thin film device includes a metal sulfide layer formed on a single crystal silicon substrate by epitaxial growth; and a compound thin film with ionic bonding, which is formed on the metal sulfide layer by epitaxial growth. Alternatively, a thin film device includes a metal sulfide layer formed on a single crystal silicon substrate by epitaxial growth; and at least two compound thin films with ionic bonding, which are formed on the metal sulfide layer by epitaxial growth. For example, (11{overscore (2)}0) surface AlN/MnS/Si (100) thin films formed by successively stacking a MnS layer (about 50 nm thick) and an AlN layer (about 1000 nm thick) on a single crystal Si (100) substrate, are used as a substrate, and a (11{overscore (2)}0) surface GaN layer (about 100 nm thick) operating as a light emitting layer is formed on the substrate, thereby fabricating a thin film device.
    Type: Application
    Filed: September 22, 2003
    Publication date: August 19, 2004
    Applicants: TOKYO INSTITUTE OF TECHNOLOGY, NATIONAL INSTITUTE FOR MATERIALS SCIENCE, FUJI ELECTRIC CORPORATE RESEARCH AND DEVELOPMENT, LTD.
    Inventors: Hideomi Koinuma, Jeong-Hwan Song, Toyohiro Chikyo, Young Zo Yoo, Parhat Ahmet, Yoshinori Konishi, Yoshiyuki Yonezawa
  • Publication number: 20030006406
    Abstract: The invention provides a thin film device where ionic crystals are epitaxially grown on a Si single crystal substrate through a proper buffer layer, and its for fabrication method. A ZnS layer is first deposited on a Si single crystal substrate. Ionic crystal thin films (an n-GaN layer, a GaN layer, and a p-GaN layer) are deposited thereon. The ZnS thin film is an oriented film excellent in crystallinity and has excellent surface flatness. When ZnS can be once epitaxially grown on the Si single crystal substrate, the ionic crystal thin films can be easily epitaxially grown subsequently. Therefore, ZnS is formed to be a buffer layer, whereby even ionic crystals having differences in lattice constants from Si can be easily epitaxially grown in an epitaxial thin film with few lattice defects on the Si single crystal substrate. The characteristics of a thin film device utilizing it can be enhanced.
    Type: Application
    Filed: June 26, 2002
    Publication date: January 9, 2003
    Inventors: Toyohiro Chikyow, Hideomi Koinuma, Masashi Kawasaki, Yoo Young Zo, Yoshinori Konishi, Yoshiyuki Yonezawa
  • Publication number: 20030001232
    Abstract: A composite integrated circuit is characterized in that to put an oxide thin film into practical use as an electronic device, a highly crystalline oxide thin film is grown on a silicon substrate. A MOS circuit and a thin film capacitor are formed independently, and the two substrates are laminated using an epoxy resin. They are connected through buried wiring, thereby constituting a composite circuit package. As a second substrate 1 a, a (110) plane orientation silicon substrate is used which differs from the IC substrate with a (100) plane. On the (110) silicon substrate after the termination processing, a dielectric layer is film deposited, followed by forming an upper electrode, and by forming a thin film coil. Insulating magnetic gel is filled between coil wires and its upper portion. Thus, the fabrication process of the thin film coil and the composite integrated circuit is completed.
    Type: Application
    Filed: June 11, 2002
    Publication date: January 2, 2003
    Inventors: Hideomi Koinuma, Masashi Kawasaki, Toyohiro Chikyow, Yoshiyuki Yonezawa, Yoshinori Konishi
  • Patent number: 6330135
    Abstract: A magneto-resistance effect element includes an oxide substrate having on its surface steps of atomic layer level and on the substrate an epitaxially grown ferromagnetic oxide thin film, the thin film formed on the atomic layer level steps having an antiphased domain boundary.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: December 11, 2001
    Inventors: Takashi Manako, Yoshinori Konishi, Masashi Kawasaki, Yoshinori Tokura, Kei-Ichiro Kobayashi, Makoto Izumi
  • Patent number: 5844273
    Abstract: A vertical semiconductor device incorporates a semiconductor laminar structure including a semiconductor substrate of a first conductive type having a relatively high impurity concentration, a first semiconductor layer of the first conductive type laminated on the semiconductor substrate and having a relatively low impurity concentration, and a second semiconductor layer of the first conductive type laminated on the first semiconductor layer and having an even lower impurity concentration. A trench is formed in the semiconductor laminar structure to extend through the second semiconductor layer into the first semiconductor layer. A source region of the first conductive type is formed in a surface layer of the second semiconductor layer and the trench is filled with a gate electrode. A source electrode is formed on the source region and a drain electrode is formed on a rear surface of the semiconductor substrate.
    Type: Grant
    Filed: December 8, 1995
    Date of Patent: December 1, 1998
    Assignee: Fuji Electric Co.
    Inventor: Yoshinori Konishi
  • Patent number: 5144027
    Abstract: Novel cephalosporins which has attached to the exomethylene group at the 3-position of the cephem ring a substituted or unsubstituted aryl, acylamino, aromatic heterocyclic, triazolyl or tetrazolyl group, said aromatic heterocyclic group being attached through a carbon-carbon bond and said triazolyl or tetrazolyl group being attached through a carbon-nitrogen bond, and has the following group attached to the amino group at the 7-position: ##STR1## wherein A represents a group of the formula, --CH.sub.2 -- or a group of the formula ##STR2## in which R.sup.5 represents a hydrogen atom or an alkyl group, and the bond.about.represents syn or anti isomer or their mixture; R.sup.3 represents a hydrogen or halogen atom; and R.sup.4 represents a hydrogen atom or an amino group which may be protected or substituted. These cephalosporins have a broad antibacterial spectrum, are stable against .beta.-lactamase produced by bacteria, have a low toxicity, and are well absorbed when administered orally or parenterally.
    Type: Grant
    Filed: May 24, 1991
    Date of Patent: September 1, 1992
    Assignee: Toyama Chemical Co., Ltd.
    Inventors: Hiroshi Sadaki, Hirokazu Narita, Hiroyuki Imaizumi, Yoshinori Konishi, Takihiro Inaba, Tatsuo Hirakawa, Hideo Taki, Masaru Tai, Yasuo Watanabe, Isamu Saikawa
  • Patent number: 4879381
    Abstract: Novel cephalosporins which has attached to the exomethylene group at the 3-position of the cephem ring a substituted or unsubstituted aryl, acylamino, aromatic heterocyclic, triazolyl or tetrazolyl group, said aromatic heterocyclic group being attached through a carbon-carbon bond and said triazolyl or tetrazolyl group being attached through a carbon-nitrogen bond, and has the following group attached to the amino group at the 7-position: ##STR1## wherein A represents a group of the formula, --CH.sub.2 -- or a group of the formula ##STR2## in which R.sup.5 represents a hydrogen atom or an alkyl group, and the bond represents syn or anti isomer or their mixture; R.sup.3 represents a hydrogen or halogen atom; and R.sup.4 represents a hydrogen atom or an amino group which may be protected or substituted. These cephalosporins have a broad antibacterial spectrum, are stable against .beta.-lactamase produced by bacteria, have a low toxicity, and are well absorbed when administered orally or parenterally.
    Type: Grant
    Filed: March 6, 1987
    Date of Patent: November 7, 1989
    Assignee: Toyoma Chemical Company, Ltd.
    Inventors: Hiroshi Sadaki, Narita Hirokazu, Hiroyuki Imaizumi, Yoshinori Konishi, Takihiro Inaba, Tatsuo Hirakawa, Hideo Taki, Masaru Tai, Yasuo Watanabe, Isamu Saikawa
  • Patent number: 4851535
    Abstract: This invention relates to a process for industrially producing a 1-substituted aryl-1,4-dihydro-4-oxonaphthyridine derivative and a salt thereof which are useful as an antibacterial agent, and also to intermediates therefor and processes for producing the intermediates.
    Type: Grant
    Filed: June 29, 1987
    Date of Patent: July 25, 1989
    Assignee: Toyama Chemical Co., Ltd.
    Inventors: Yozo Todo, Tetsuo Yamafuji, Katsuyuki Nagumo, Isao Kitayama, Hideyoshi Nagaki, Mikako Miyajima, Yoshinori Konishi, Hirokazu Narita, Shuntaro Takano, Isamu Saikawa
  • Patent number: 4704459
    Abstract: This invention relates to a process for industrially producing a 1-substituted aryl-1,4-dihydro-4-oxonaphthyridine derivative and a salt thereof which are useful as an antibacterial agent, and also to intermediates therefor and processes for producing the intermediates.
    Type: Grant
    Filed: January 17, 1986
    Date of Patent: November 3, 1987
    Assignee: Toyama Chemical Co., Ltd.
    Inventors: Yozo Todo, Tetsuo Yamafuji, Katsuyuki Nagumo, Isao Kitayama, Hideyoshi Nagaki, Mikako Miyajima, Yoshinori Konishi, Hirokazu Narita, Shuntaro Takano, Isamu Saikawa