Abstract: A diffuser which forms a first acoustic passage that sound waves propagate and which radiates the sound waves to an outer diameter direction between a diaphragm and an annular conical surface of a first reflection member, and forms a second acoustic passage the sound waves which pass the opening of the first reflection member propagate and which radiates the sound waves to an outer diameter direction between the annular concave surface of the first reflection member and a conical surface of a second reflection member.

Abstract: An ultrasonic treatment apparatus including: an ultrasonic bath for performing an ultrasonic treatment on a treatment target object; a first ultrasonic vibrator provided on the front surface side of the treatment target object; and a second ultrasonic vibrator provided on the back surface side of the treatment target object; wherein the first ultrasonic vibrator does not face the second ultrasonic vibrator.

Abstract: A switching power supply comprising: a feedback element; a voltage detection element which is connected to the feedback element at secondary side of the switching power supply and changes current which flows to the feedback element based on output voltage of the switching power supply; a control circuit which is connected to the feedback element at primary side of the switching power supply and controls the switching element; and a current detection resistor which is connected to the switching element, wherein the controller circuit controls burst mode or normal mode based on voltage which is occurred in a first terminal which is connected between the current detection resistor and the switching element and a value based on voltage which is occurred in a second terminal which is connected to the feedback element, sets the switching element ON until the voltage which is occurred in the first terminal reaches to the value based on the voltage which is occurred in the second terminal, and sets the switching elem

Abstract: A signal processing device configured to perform: low pass filter processing to extract a low frequency component of an audio signal, compression processing to compress the audio signal to which the low pass filter processing is performed in a case that the audio signal to which the low pass filter processing is performed is not less than a predetermined signal level, high pass filter processing to extract high frequency component of the audio signal, first volume processing to attenuate the audio signal, and synthesis processing to synthesize the low frequency component of the audio signal to which the compression processing is performed and high frequency component of the audio signal.

Abstract: To resolve volume shortage of middle and high band of speaker reproduction sound. A DSP 4 performs LPF processing to extract low frequency component of an audio signal to which the first volume processing is performed, DRC processing to compress the audio signal to which the LPF processing is performed in case that the audio signal to which the LPF processing is performed is not less than a predetermined signal level, HPF processing to extract high frequency component of the audio signal to which the first volume processing is performed, second volume processing to attenuate the audio signal to which the HPF processing is performed based on the volume value that is received, and synthesis processing to synthesize the audio signal to which the DRC processing is performed and the audio signal to which the second volume processing is performed.

Abstract: An ultrasonic treatment apparatus including: an ultrasonic bath for performing an ultrasonic treatment on a treatment target object; a first ultrasonic vibrator provided on the front surface side of the treatment target object; and a second ultrasonic vibrator provided on the back surface side of the treatment target object; wherein the first ultrasonic vibrator does not face the second ultrasonic vibrator.

Abstract: To resolve volume shortage of middle and high band of speaker reproduction sound. A DSP 4 performs LPF processing to extract low frequency component of an audio signal to which the first volume processing is performed, DRC processing to compress the audio signal to which the LPF processing is performed in case that the audio signal to which the LPF processing is performed is not less than a predetermined signal level, HPF processing to extract high frequency component of the audio signal to which the first volume processing is performed, second volume processing to attenuate the audio signal to which the HPF processing is performed based on the volume value that is received, and synthesis processing to synthesize the audio signal to which the DRC processing is performed and the audio signal to which the second volume processing is performed.

Abstract: Provided is a modulation circuit that can correct an output state in real time and reliably modulate an input signal to output the modulated signal. The signal modulation circuit includes a subtractor, an integrator, a chopper circuit, a frequency divider, and a D-type flip-flop. A delay circuit of a sigma delta modulation circuit is not provided to a feedback circuit, and a signal is delayed and quantized in the D-type flip-flop. The chopper circuit inserts a zero level at timing synchronized with a clock signal, so that pulse density modulation is performed.

Abstract: To realize active control ground that sets inverted output of an amplification circuit to ground with simple configuration. A DAP 1 comprises a positive side DAC 7 that D/A-converts digital audio data into analog audio data, a positive side amplification circuit 9 that amplifies the analog audio data that the DAC 7 D/A-converts, a negative side DAC 8 that D/A-converts the digital audio data into the analog audio data, and a negative side amplification circuit 10 that amplifies the analog audio data that the DAC 8 D/A-converts, and a CPU 2. The CPU 2 mutes the DAC 8 in case of an ACG mode that sets output of the amplification circuit 10 to ground.

Abstract: To reduce signal output and wiring to a D/A converter (DAC). A DAP 1 comprises a DAC 7 that D/A-converts LR 2 channels digital audio data into LR 2 channels analog audio data, an amplification circuit 9 that amplifies the LR 2 channels analog audio data that the DAC 7 D/A-converts, a DAC 8 that D/A-converts the LR 2 channels digital audio data into the LR 2 channels analog audio data, and an amplification circuit 10 that amplifies inverted LR 2 channels analog audio data that the LR 2 channels analog audio data that the DAC 8 D/A-converts is inverted.

Abstract: Provided is a circuit which can correct an output state in real time and reduce influences of distortion/noise components generated by a delay device. A signal modulation circuit includes a subtractor, an integrator, a phase inverting circuit, a DFF for while inserting a zero level at timing synchronous with the clock signal, delaying and quantizing the signal, a ternary signal generating circuit for generating a ternary signal for selectively driving a load connected to a single power supply into ternary conductive states including a positive current on-state, a negative current on-state, and an off-state, a driver circuit for generating a driving signal for driving a load, and a feedback circuit for feeding back the driving signal from the driver circuit to the input signal.

Abstract: To realize active control ground that sets inverted output of an amplification circuit to ground with simple configuration. A DAP 1 comprises a positive side DAC 7 that D/A-converts digital audio data into analog audio data, a positive side amplification circuit 9 that amplifies the analog audio data that the DAC 7 D/A-converts, a negative side DAC 8 that D/A-converts the digital audio data into the analog audio data, and a negative side amplification circuit 10 that amplifies the analog audio data that the DAC 8 D/A-converts, and a CPU 2. The CPU 2 mutes the DAC 8 in case of an ACG mode that sets output of the amplification circuit 10 to ground.

Abstract: To reduce signal output and wiring to a D/A converter (DAC). A DAP 1 comprises a DAC 7 that D/A-converts LR 2 channels digital audio data into LR 2 channels analog audio data, an amplification circuit 9 that amplifies the LR 2 channels analog audio data that the DAC 7 D/A-converts, a DAC 8 that D/A-converts the LR 2 channels digital audio data into the LR 2 channels analog audio data, and an amplification circuit 10 that amplifies inverted LR 2 channels analog audio data that the LR 2 channels analog audio data that the DAC 8 D/A-converts is inverted.

Abstract: A signal modulation circuit includes a feedback circuit configured to generate the feedback signal for feeding back a drive signal from a driver circuit to an input signal. The feedback circuit includes at least first and second resistors connected together in series, the second resistor having a higher resistance value than that of the first resistor. One end of the first resistor is connected to a subtracter, and one end of the second resistor is connected to the driver circuit. A first line distance as the line length between one end of the first resistor and the subtracter and a second line distance as the line length between one end of the second resistor and the driver circuit are set shorter than a third line distance as the line length between the other end of the first resistor and the other end of the second resistor.

Abstract: Provided is a modulation circuit that can correct an output state in real time and reliably modulate an input signal to output the modulated signal. The signal modulation circuit includes a subtractor, an integrator, a chopper circuit, a frequency divider, and a D-type flip-flop. A delay circuit of a sigma delta modulation circuit is not provided to a feedback circuit, and a signal is delayed and quantized in the D-type flip-flop. The chopper circuit inserts a zero level at timing synchronized with a clock signal, so that pulse density modulation is performed.

Abstract: Provided is a modulation circuit that can correct an output state in real time and reliably modulate an input signal to output the modulated signal. The signal modulation circuit includes a subtracter, an integrator, a chopper circuit, a frequency divider, and a D-type flip-flop. A delay circuit of a sigma delta modulation circuit is not provided to a feedback circuit, and a signal is delayed and quantized in the D-type flip-flop. The chopper circuit inserts a zero level at timing synchronized with a clock signal, so that pulse density modulation is performed.

Abstract: A circuit having versatility synthesizes one-bit digital signals to generate a ternary signal. The pulse synthesizing circuit synthesizes one-bit digital signals from two DFFs to generate a ternary signal. The pulse synthesizing circuit has a first NOR gate, a second NOR gate, a third NOR gate, and three switches. The first switch is connected to a first electric potential, the second switch is connected to a second electric potential, and the third switch is connected to a third electric potential. The first to third switches are turned on/off according to logical values of the signals from the two DFFs, and any of the first electric potential, the second electric potential, and the third electric potential is set as an output potential so that a ternary signal is generated.

Abstract: A circuit having versatility synthesizes one-bit digital signals to generate a ternary signal. The pulse synthesizing circuit synthesizes one-bit digital signals from two DFFs to generate a ternary signal. The pulse synthesizing circuit has a first NOR gate, a second NOR gate, a third NOR gate, and three switches. The first switch is connected to a first electric potential, the second switch is connected to a second electric potential, and the third switch is connected to a third electric potential. The first to third switches are turned on/off according to logical values of the signals from the two DFFs, and any of the first electric potential, the second electric potential, and the third electric potential is set as an output potential so that a ternary signal is generated.

Abstract: Provided is a circuit which can correct an output state in real time and reduce influences of distortion/noise components generated by a delay device. A signal modulation circuit includes a subtractor, an integrator, a phase inverting circuit, a DFF for while inserting a zero level at timing synchronous with the clock signal, delaying and quantizing the signal, a ternary signal generating circuit for generating a ternary signal for selectively driving a load connected to a single power supply into ternary conductive states including a positive current on-state, a negative current on-state, and an off-state, a driver circuit for generating a driving signal for driving a load, and a feedback circuit for feeding back the driving signal from the driver circuit to the input signal.

Abstract: A pulse width modulation signal with a less distortion component that is not influenced by a common-mode noise or an offset voltage is generated. Pulse signal generation circuits 6, 7 generate pulse signals S1, S2 whose pulse widths are discharge times t1, t2 of integrators 3, 4, respectively, a PWM signal generation circuit 8 detects discharge end timings of the integrators 3, 4 based on the pulse signals S1, S2, and a pulse whose pulse width is a time between discharge end timing of one of the integrators 4 and discharge end timing of the other one of the integrators 3 is generated so as to be output as a PWM signal Spwm.