Patents by Inventor Yoshinori NAKATOMI

Yoshinori NAKATOMI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230408777
    Abstract: According to the present disclosure, an optical circuit board includes a wiring board and an optical waveguide. The wiring board has a first region on which a silicon photonics device is mounted, a cavity, and a second region, with the cavity interposed between the first region and the second region. The wiring board further includes a first conductor layer in the second region. The optical waveguide is located on the first conductor layer and includes a core surrounded by claddings. The first conductor layer includes a portion protruding toward the first region above the cavity.
    Type: Application
    Filed: October 20, 2021
    Publication date: December 21, 2023
    Applicant: KYOCERA Corporation
    Inventor: Yoshinori NAKATOMI
  • Publication number: 20230025872
    Abstract: An optical circuit board of the present disclosure includes a wiring board and an optical waveguide located on the wiring board. The optical waveguide includes a lower cladding layer, a core located on the lower cladding layer, an upper cladding layer located on the lower cladding layer and covering the core, a first cavity extending from the upper cladding layer to the lower cladding layer and dividing the core, and at least two second cavities extending from the upper cladding layer to the lower cladding layer and located with the core therebetween in plan view. The first cavity has a first opening portion located on the upper cladding layer side and a first bottom portion located on the lower cladding layer side. The second cavities each include a second opening portion located on the upper cladding layer side and a second bottom portion located on the lower cladding layer side.
    Type: Application
    Filed: December 4, 2020
    Publication date: January 26, 2023
    Applicant: KYOCERA Corporation
    Inventor: Yoshinori NAKATOMI
  • Publication number: 20220268998
    Abstract: An optical circuit board includes a wiring board and an optical waveguide located on a surface of the wiring board. The optical waveguide includes a lower cladding layer, a core, and an upper cladding layer disposed in this order from the wiring board. The lower cladding layer includes a first region including an opening portion, and a second region in which the core and the upper cladding layer are disposed in this order, the second region being adjacent to the first region. The core includes an exposed portion having the upper cladding layer not disposed in the first region. Furthermore, at least one supporting member is disposed in a circumference edge portion of the opening portion, in the first region of the lower cladding layer, and a difference between a height of the supporting member and a height of the exposed portion in the core is 5% or less.
    Type: Application
    Filed: May 12, 2020
    Publication date: August 25, 2022
    Applicant: KYOCERA Corporation
    Inventor: Yoshinori NAKATOMI
  • Publication number: 20170345747
    Abstract: A multilayer substrate includes a component mounting substrate having component mounting and non-mounting surfaces and including connection pads on both the mounting surfaces, a sealing resin layer having an upper surface in close contact with the non-mounting surface and a flat lower surface, a semiconductor element having an electrode formation surface on which electrodes are formed, and embedded in the sealing resin layer with the electrode formation surface exposed at the flat lower surface, an insulating layer formed in close contact with the electrode formation surface and the flat lower surface, through-holes continuously penetrating through the insulating layer and the sealing resin layer and having bottom ends defined by the connection pads on the non-mounting substrate, via holes penetrating through the insulating layer and having bottom ends defined by the electrodes, and wiring conductors formed inside the through-holes and the via holes and on a surface of the insulating layer.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 30, 2017
    Applicant: KYOCERA Corporation
    Inventor: Yoshinori NAKATOMI
  • Patent number: 9502340
    Abstract: A method for manufacturing a wiring board according to the present invention includes the steps of preparing a supporting substrate having a product forming region and a marginal region; preparing a separable metal foil whose area is larger than that of the product forming region and is smaller than that of the supporting substrate; fixing the separable metal foil to the supporting substrate by burying into the supporting substrate; forming a build-up section on the buried separable metal foil; integrally cutting out the supporting substrate, the separable metal foil and the build-up section; obtaining a laminated body for wiring board composed of the second metal foil and the build-up section by separating the first metal foil and the second metal foil; and forming the wiring conductor layer by removing a part of the second metal foil.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: November 22, 2016
    Assignee: KYOCERA CORPORATION
    Inventors: Daisuke Narumi, Yoshinori Nakatomi, Masaharu Yasuda
  • Publication number: 20160189979
    Abstract: The method for producing a wiring board according to the present invention includes the steps of: preparing an insulating board including a cavity forming area and a wiring forming area; forming a first wiring conductor in the wiring forming area; forming a cavity in the cavity forming area and an opening in a part of the wiring forming area; inserting an electronic component including an external electrode into the cavity; forming insulating layers on upper and lower surfaces of the insulating board, the insulating layers filled into a gap in the cavity and into the opening; forming a through-hole penetrating through the opening from the insulating layer on an upper surface side to the insulating layer on a lower surface side; and forming a second wiring conductor on a surface of the insulating layer and in the through-hole.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 30, 2016
    Applicant: KYOCERA Circuit Solutions, Inc.
    Inventor: Yoshinori NAKATOMI
  • Publication number: 20140182126
    Abstract: A method for manufacturing a wiring board according to the present invention includes the steps of preparing a supporting substrate having a product forming region and a marginal region; preparing a separable metal foil whose area is larger than that of the product forming region and is smaller than that of the supporting substrate; fixing the separable metal foil to the supporting substrate by burying into the supporting substrate; forming a build-up section on the buried separable metal foil; integrally cutting out the supporting substrate, the separable metal foil and the build-up section; obtaining a laminated body for wiring board composed of the second metal foil and the build-up section by separating the first metal foil and the second metal foil; and forming the wiring conductor layer by removing a part of the second metal foil.
    Type: Application
    Filed: December 10, 2013
    Publication date: July 3, 2014
    Applicant: KYOCERA SLC Technologies Corporation
    Inventors: Daisuke NARUMI, Yoshinori NAKATOMI, Masaharu YASUDA