Patents by Inventor Yoshinori Nishi

Yoshinori Nishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11953137
    Abstract: A rotary joint capable of lubricating a sealing surface of a mechanical seal forming a fluid passage through which a gas flows using a liquid even when the liquid flows through only one fluid passage is disclosed. A rotary joint includes a plurality of mechanical seals provided in an axial direction in an annular space between a case body and a shaft body to form a first intermediate flow passage that connects a first outer flow passage and a first inner flow passage of a first fluid passage through which a liquid flows to each other and form a second intermediate flow passage that connects a second outer flow passage and a second inner flow passage of a second fluid passage through which a gas flows to each other.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: April 9, 2024
    Assignee: Nippon Pillar Packing Co., Ltd.
    Inventors: Yoshinori Kikuyama, Osamu Suzuki, Takashi Nishi
  • Publication number: 20230246661
    Abstract: A simultaneous bi-directional (SBD) transceiver includes a main transmit driver, a replica transmit driver, and a series-series-bridged (SSB) tri-impedance network. A pre-driver stage includes parallel delay paths for the main transmit driver and the replica transmit driver, enabling the delay for signals received by the main transmit driver and the replica transmit driver to be independently configured.
    Type: Application
    Filed: September 12, 2022
    Publication date: August 3, 2023
    Applicant: NVIDIA Corp.
    Inventors: Xi Chen, Yoshinori Nishi, John Poulton
  • Patent number: 9118321
    Abstract: An exemplary differential output buffer includes a mixing stage and an output stage. The mixing stage includes a mixing circuit that mixes a differential data signal and an inverted delayed differential data signal to generate a mixed differential data signal. The output stage includes a first and a second output stage differential pair of transistors. Sources of the transistors in each of the output stage differential pairs are commonly coupled. Gates of the transistors in the first and second output stage differential pairs are supplied with the differential data signal and the mixed differential data signal, respectively. Drains of corresponding ones of the transistors in the first and second output stage differential pairs are commonly connected to form output nodes to output an emphasized differential data signal. The mixing stage includes a mixing ratio setting circuit that sets the mixing ratio to one of 1:0, 1:1, and 0:1.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: August 25, 2015
    Assignee: MegaChips Corporation
    Inventors: Yoshinori Nishi, Purushotham Brahmavar Ramakrishna, Srinivas Rao Madala
  • Patent number: 8995595
    Abstract: Apparatus and method for receiving burst data signal without using external detection signal are disclosed. The apparatus can include a clock data recovery (CDR) circuit to generate a clock signal, and a detection circuit to detect an initial portion in the data recovered from the input signal. The CDR circuit can have a first mode that attempts to synchronize the clock signal with a reference data signal, and a second mode that attempts to synchronize the clock signal with the burst data signal and to recover data based on the clock signal. The apparatus can include a controller to conduct a process including, in sequence, setting the CDR circuit in the first mode, setting the CDR circuit in the second mode, and keeping the CDR circuit in the second mode when the detection circuit detects the initial portion in the recovered data.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 31, 2015
    Assignee: MegaChips Corporation
    Inventors: Yoshinori Nishi, Masahiro Konishi
  • Publication number: 20140225662
    Abstract: An approach is provided for a low-voltage, high-accuracy current mirror circuit. In one example, a current mirror circuit includes an input circuit configured to receive an input reference current. The input circuit includes a feedback channel for comparing and substantially matching the input reference current with an output current. The feedback channel is not configured for matching an input voltage with an output voltage. The input circuit does not include a comparator having an operational amplifier to compare the input reference current with the output current. The current mirror circuit also includes an output circuit coupled to the input circuit. The output circuit is configured to send the output current to one or more components of a circuit block.
    Type: Application
    Filed: February 11, 2013
    Publication date: August 14, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Yoshinori NISHI
  • Publication number: 20140105614
    Abstract: Apparatus and method for receiving burst data signal without using external detection signal are disclosed. The apparatus can include a clock data recovery (CDR) circuit to generate a clock signal, and a detection circuit to detect an initial portion in the data recovered from the input signal. The CDR circuit can have a first mode that attempts to synchronize the clock signal with a reference data signal, and a second mode that attempts to synchronize the clock signal with the burst data signal and to recover data based on the clock signal. The apparatus can include a controller to conduct a process including, in sequence, setting the CDR circuit in the first mode, setting the CDR circuit in the second mode, and keeping the CDR circuit in the second mode when the detection circuit detects the initial portion in the recovered data.
    Type: Application
    Filed: December 18, 2013
    Publication date: April 17, 2014
    Applicant: MegaChips Corporation
    Inventors: Yoshinori NISHI, Masahiro Konishi
  • Patent number: 8659325
    Abstract: An output driver circuit including a pre-driver stage that receives a first data signal, the pre-driver stage including a plurality of first differential pairs that perform current subtraction to output a second data signal based on the first data signal, and an output driver stage electrically coupled to the pre-driver stage that receives the second data signal from the pre-driver stage, the output driver stage including a plurality of second differential pairs that transmit an output signal along transmission lines.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: February 25, 2014
    Assignee: MegaChips Corporation
    Inventor: Yoshinori Nishi
  • Patent number: 8649473
    Abstract: Apparatus and method for receiving burst data signal without using external detection signal are disclosed. The apparatus can include a clock data recovery (CDR) circuit to generate a clock signal, and a detection circuit to detect an initial portion in the data recovered from the input signal. The CDR circuit can have a first mode that attempts to synchronize the clock signal with a reference data signal, and a second mode that attempts to synchronize the clock signal with the burst data signal and to recover data based on the clock signal. The apparatus can include a controller to conduct a process including, in sequence, setting the CDR circuit in the first mode, setting the CDR circuit in the second mode, and keeping the CDR circuit in the second mode when the detection circuit detects the initial portion in the recovered data.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: February 11, 2014
    Assignee: MegaChips Corporation
    Inventors: Yoshinori Nishi, Masahiro Konishi
  • Patent number: 8342053
    Abstract: An operating device for a manual transmission apparatus includes: a plurality of operation shafts, supported at a housing to move in an axial direction thereof and selectively engaging one of a plurality of shift gear sets by one of the plurality of the operation shafts being moved in the axial direction thereof; a shift-and-select shaft, supported at the housing, selecting one of the plurality of the operation shafts by rotating in a circumferential direction of the shift-and-select shaft and moving the selected operation shaft in the axial direction of the selected operation shaft by moving in the axial direction of the shift-and-select shaft; an operating portion for manually operating the shift-and-select shaft; and an inertia unit, including an engagement portion, which is engageable with the shift-and-select shaft, pivotably supported at the housing, and pivoting in response to a movement of the shift-and-select shaft in the axial direction thereof.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: January 1, 2013
    Assignee: Aisin AI Co., Ltd.
    Inventors: Ryuichi Matsushita, Kazuo Yoshida, Ryuji Honma, Yoshinori Nishi
  • Publication number: 20120262205
    Abstract: An output driver circuit including a pre-driver stage that receives a first data signal, the pre-driver stage including a plurality of first differential pairs that perform current subtraction to output a second data signal based on the first data signal, and an output driver stage electrically coupled to the pre-driver stage that receives the second data signal from the pre-driver stage, the output driver stage including a plurality of second differential pairs that transmit an output signal along transmission lines.
    Type: Application
    Filed: June 25, 2012
    Publication date: October 18, 2012
    Applicant: Kawasaki Microelectronics, Inc.
    Inventor: Yoshinori Nishi
  • Publication number: 20120249188
    Abstract: An exemplary differential output buffer includes a mixing stage and an output stage. The mixing stage includes a mixing circuit that mixes a differential data signal and an inverted delayed differential data signal to generate a mixed differential data signal. The output stage includes a first and a second output stage differential pair of transistors. Sources of the transistors in each of the output stage differential pairs are commonly coupled. Gates of the transistors in the first and second output stage differential pairs are supplied with the differential data signal and the mixed differential data signal, respectively. Drains of corresponding ones of the transistors in the first and second output stage differential pairs are commonly connected to form output nodes to output an emphasized differential data signal. The mixing stage includes a mixing ratio setting circuit that sets the mixing ratio to one of 1:0, 1:1, and 0:1.
    Type: Application
    Filed: March 23, 2012
    Publication date: October 4, 2012
    Applicant: KAWASAKI MICROELECTRONICS INC.
    Inventors: Yoshinori NISHI, Purushotham Brahmavar Ramakrishna, Srinivas Rao MADALA
  • Patent number: 8228096
    Abstract: An output driver circuit including a pre-driver stage that receives a first data signal, the pre-driver stage including a plurality of first differential pairs that perform current subtraction to output a second data signal based on the first data signal, and an output driver stage electrically coupled to the pre-driver stage that receives the second data signal from the pre-driver stage, the output driver stage including a plurality of second differential pairs that transmit an output signal along transmission lines.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: July 24, 2012
    Assignee: Kawasaki Microelectronics, Inc.
    Inventor: Yoshinori Nishi
  • Publication number: 20110001531
    Abstract: Apparatus and method for receiving burst data signal without using external detection signal are disclosed. The apparatus can include a clock data recovery (CDR) circuit to generate a clock signal, and a detection circuit to detect an initial portion in the data recovered from the input signal. The CDR circuit can have a first mode that attempts to synchronize the clock signal with a reference data signal, and a second mode that attempts to synchronize the clock signal with the burst data signal and to recover data based on the clock signal. The apparatus can include a controller to conduct a process including, in sequence, setting the CDR circuit in the first mode, setting the CDR circuit in the second mode, and keeping the CDR circuit in the second mode when the detection circuit detects the initial portion in the recovered data.
    Type: Application
    Filed: June 28, 2010
    Publication date: January 6, 2011
    Applicant: KAWASAKI MICROELECTRONICS, INC.
    Inventors: Yoshinori Nishi, Masahiro Konishi
  • Publication number: 20110001530
    Abstract: Apparatus and method for receiving burst data signal without using external detection signal are disclosed. The apparatus can include a clock data recovery (CDR) circuit to generate a clock signal, and a detection circuit to detect an initial portion in the data recovered from the input signal. The CDR circuit can have a first mode that attempts to synchronize the clock signal with a reference data signal, and a second mode that attempts to synchronize the clock signal with the burst data signal and to recover data based on the clock signal. The apparatus can include a controller to conduct a process including, in sequence, setting the CDR circuit in the first mode, setting the CDR circuit in the second mode, and keeping the CDR circuit in the second mode when the detection circuit detects the initial portion in the recovered data.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 6, 2011
    Applicant: KAWASAKI MICROELECTRONICS INC.
    Inventors: Yoshinori NISHI, Masahiro KONISHI
  • Publication number: 20090301250
    Abstract: An operating device for a manual transmission apparatus includes: a plurality of operation shafts, supported at a housing to move in an axial direction thereof and selectively engaging one of a plurality of shift gear sets by one of the plurality of the operation shafts being moved in the axial direction thereof; a shift-and-select shaft, supported at the housing, selecting one of the plurality of the operation shafts by rotating in a circumferential direction of the shift-and-select shaft and moving the selected operation shaft in the axial direction of the selected operation shaft by moving in the axial direction of the shift-and-select shaft; an operating portion for manually operating the shift-and-select shaft; and an inertia unit, including an engagement portion, which is engageable with the shift-and-select shaft, pivotably supported at the housing, and pivoting in response to a movement of the shift-and-select shaft in the axial direction thereof.
    Type: Application
    Filed: June 9, 2009
    Publication date: December 10, 2009
    Applicant: AISIN AI CO., LTD
    Inventors: Ryuichi Matsushita, Kazuo Yoshida, Ryuji Honma, Yoshinori Nishi
  • Patent number: 7575091
    Abstract: An electric power steering apparatus comprises a transmission mechanism for transmitting driving force of a steering assisting electric motor to a steering mechanism. A driven gear of the transmission mechanism is rotatably supported by first and second bearings. One of the first and second bearings includes an inner ring coupled so as to be rotatable together with an output shaft of a steering shaft, an outer ring held on a housing, and a rolling element interposed between the inner ring and the outer ring. One of the inner ring and the outer ring includes an annular elastic plate giving a preload to the rolling element.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: August 18, 2009
    Assignee: JTekt Corporation
    Inventors: Susumu Imagaki, Seiji Sunada, Yoshinori Nishi
  • Publication number: 20090157340
    Abstract: Aspects of the disclosure provide a method for calibrating a circuit performance. The method can stabilize the circuit performance over time, and maintain the circuit performance substantially in a specification independent of various variation sources. Therefore, chip reliability can be improved and high product yield can be achieved. The method for calibrating the circuit performance can include assigning levels to a set of circuit parameters of a circuit, measuring values of the circuit parameters during operation of the circuit, generating a control signal that corresponds to the measured circuit parameters weighted according to the assigned levels, and adjusting a feedback relationship of a feedback loop circuit of the circuit in a close loop feedback system according to the control signal so as to change the circuit performance.
    Type: Application
    Filed: December 17, 2007
    Publication date: June 18, 2009
    Applicant: KAWASAKI MICROELECTRONICS U.S.A., INC.
    Inventors: Anand Gopalan, Yoshinori Nishi
  • Publication number: 20080218222
    Abstract: An output driver circuit including a pre-driver stage that receives a first data signal, the pre-driver stage including a plurality of first differential pairs that perform current subtraction to output a second data signal based on the first data signal, and an output driver stage electrically coupled to the pre-driver stage that receives the second data signal from the pre-driver stage, the output driver stage including a plurality of second differential pairs that transmit an output signal along transmission lines.
    Type: Application
    Filed: March 2, 2007
    Publication date: September 11, 2008
    Applicant: KAWASAKI MICROELECTRONICS, INC.
    Inventor: Yoshinori Nishi
  • Publication number: 20070193821
    Abstract: An electric power steering apparatus comprises a transmission mechanism for transmitting driving force of a steering assisting electric motor to a steering mechanism. A driven gear of the transmission mechanism is rotatably supported by first and second bearings. One of the first and second bearings includes an inner ring coupled so as to be rotatable together with an output shaft of a steering shaft, an outer ring held on a housing, and a rolling element interposed between the inner ring and the outer ring. One of the inner ring and the outer ring includes an annular elastic plate giving a preload to the rolling element.
    Type: Application
    Filed: January 24, 2007
    Publication date: August 23, 2007
    Applicant: JTEKT Corporation
    Inventors: Susumu Imagaki, Seiji Sunada, Yoshinori Nishi
  • Publication number: 20060088086
    Abstract: An equalizer may use reverse scaling of physical dimensions between a plurality of equalizer stages to improve overall bandwidth. The equalizer may provide 20 dB of peaking at 5 GHz with good linearity and little noise accumulation, using CMOS technology.
    Type: Application
    Filed: August 31, 2005
    Publication date: April 27, 2006
    Applicant: KAWASAKI MICROELECTRONICS AMERICA, INC.
    Inventors: Srikanth Gondi, Yoshinori Nishi