Patents by Inventor Yoshinori Numano

Yoshinori Numano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6985195
    Abstract: A reflection type liquid crystal display is formed by an interlayer insulating film having appropriate unevenness of an inseparable pattern in a picture element region and having a contact hole of a separable pattern on a drain electrode of a TFT is formed by plainly applying a photosensitive insulating resin so that it may dissolve difference in level caused by a gate electrode wiring, source electrode wiring, and the TFT, and conducting exposure and development while changing exposure amount. The exposure of the insulating resin is conducted through divisional exposure in which the inseparable pattern and the separable pattern are arranged on different masks, and the inseparable pattern is exposed by a predetermined exposure amount of 20 to 80% of an exposure amount for the separable pattern.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: January 10, 2006
    Assignee: Kabushiki Kaisha Advanced Display
    Inventors: Munehito Kumagai, Kazunori Inoue, Keisuke Nakaguchi, Yoshinori Numano
  • Patent number: 6421102
    Abstract: Parasitic capacity between Cs lines and source lines forming a pixel section is reduced, whereby characteristic resistant to crosstalk is achieved, aperture ratio is increased, and brightness of LCD is increased. The Cs lines are arranged on the source lines in such a manner as to cover the source lines, and pixel electrodes are arranged and formed on the Cs lines in such a manner as to partially overlap. By forming a structure in which the source lines, the Cs lines and the pixel electrodes are laminated in order, parasitic capacity between the Cs lines and the source lines forming a pixel section can be reduced, and crosstalk can be minimized. As a distance between the source lines and the pixel electrodes can be reduced from the viewpoint of a plan view, aperture ratio can be improved.
    Type: Grant
    Filed: January 12, 2001
    Date of Patent: July 16, 2002
    Assignee: Kabushiki Kaisha Advanced Display
    Inventors: Akio Nakayama, Yoshinori Numano
  • Patent number: 6411346
    Abstract: A liquid crystal displaying apparatus which is high in displaying quantity is provided, wherein the displaying quantity reduction such as flickering, image sticking, ununiformly displaying and so on which is caused due to changes for each exposing region of the &Dgr;Vgd. In the liquid crystal displaying apparatus of the present invention, a plurality of scanning wirings and a plurality of signal wirings, TFTs and pixel electrodes are formed. Storage capacitance for retaining the electric charge is connected with the pixel electrode, another electrode opposite to an electrode for forming the storage capacitance and the drain electrode of the TFT are formed at the same time, an array substrate where another electrode is superposed on the scanning wiring and the signal wiring through the transparent insulating film, and a liquid crystal displaying provided with an counter substrate having a common electrode to be arranged opposite to the pixel electrode.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: June 25, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshinori Numano, Satoru Kawamoto, Ken Nakashima
  • Patent number: 6404465
    Abstract: Parasitic capacity between Cs lines and source lines forming a pixel section is reduced, whereby characteristic resistant to crosstalk is achieved, aperture ratio is increased, and brightness of LCD is increased. The Cs lines are arranged on the source lines in such a manner as to cover the source lines, and pixel electrodes are arranged and formed on the Cs lines in such a manner as to partially overlap. By forming a structure in which the source lines, the Cs lines and the pixel electrodes are laminated in order, parasitic capacity between the Cs lines and the source lines forming a pixel section can be reduced, and crosstalk can be minimized. As a distance between the source lines and the pixel electrodes can be reduced from the viewpoint of a plan view, aperture ratio can be improved.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: June 11, 2002
    Assignee: Kabushiki Kaisha Advanced Display
    Inventors: Akio Nakayama, Yoshinori Numano
  • Publication number: 20010048499
    Abstract: A liquid crystal displaying apparatus high in display quality is provided which is high in aperture ratio and is free from the cross talk. In an liquid crystal displaying apparatus of the present invention, having an array substrate provided with a plurality of scanning wirings and a plurality of signal wirings, active elements, pixel electrodes, and a first alignment film, and an counter substrate provided with a common electrode and a second alignment film, and a liquid crystal layer where the liquid crystal molecule is aligned by the first and second alignment films positioned on a space between the array substrate and the counter substrate, a third alignment film where mutually different distortion is given to the liquid crystal molecule is formed about the intermediate region between the adjacent pixel electrodes.
    Type: Application
    Filed: August 6, 2001
    Publication date: December 6, 2001
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Yoshinori Numano, Akira Tsumura, Toshinori Iwasa, Masaya Mizunuma
  • Publication number: 20010045995
    Abstract: A liquid crystal display including an insulating substrate, a plurality of gate electrodes, a common line for auxiliary capacitance arranged between adjacent gate electrodes, said common line being formed on the insulating substrate and the adjacent gate electrodes, at least one layer of semiconductor material film formed so as to cover at least one portion of the gate electrodes through the gate insulating film formed on the insulating substrate, a source region and a drain region formed in the semiconductor material film, a pixel electrode formed on the gate insulating film and formed to cover the common line, an electrode for capacitance to be connected with the pixel electrode and formed to superpose one portion on the adjacent gate electrode, and a source and a drain electrode provided respectively on the source region and the drain region.
    Type: Application
    Filed: May 29, 1997
    Publication date: November 29, 2001
    Inventors: YOSHINORI NUMANO, KAZUHIRO KOBAYASHI
  • Patent number: 6313898
    Abstract: A liquid crystal displaying apparatus high in display quality is provided which is high in aperture ratio and is free from the cross talk. In an liquid crystal displaying apparatus of the present invention, having an array substrate provided with a plurality of scanning wirings and a plurality of signal wirings, active elements, pixel electrodes, and a first alignment film, and an counter substrate provided with a common electrode and a second alignment film, and a liquid crystal layer where the liquid crystal molecule is aligned by the first and second alignment films positioned on a space between the array substrate and the counter substrate, a third alignment film where mutually different distortion is given to the liquid crystal molecule is formed about the intermediate region between the adjacent pixel electrodes.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: November 6, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshinori Numano, Akira Tsumura, Toshinori Iwasa, Masaya Mizunuma
  • Publication number: 20010002143
    Abstract: Parasitic capacity between Cs lines and source lines forming a picture element section is reduced, whereby characteristic resistant to crosstalk is achieved, opening ratio is increased, and brightness of LCD is increased.
    Type: Application
    Filed: January 12, 2001
    Publication date: May 31, 2001
    Applicant: Kabushiki Kaisha Advanced Display
    Inventors: Akio Nakayama, Yoshinori Numano
  • Patent number: 6078369
    Abstract: A matrix liquid crystal display device including at least a TFT array substrate, an opposite substrate arranged opposite to the TFT array substrate, a liquid crystal material interposed between the TFT array substrate and the opposite substrate, TCPs and PCBs; the TFT array substrate including thereon bus lines connected with the TCPs, repair lines, and TFTs; the repair lines being provided on a periphery of the TFT array substrate by means of divisional exposure, wherein the repair lines are provided in such a manner that at least two of the same line patterns are repeated.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: June 20, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Satoru Kawamoto, Yoshinori Numano, Ken Nakasima
  • Patent number: 6023310
    Abstract: A matrix liquid crystal display device including at least a TFT array substrate, an opposite substrate arranged opposite to the TFT array substrate, a liquid crystal material interposed between the TFT array substrate and the opposite substrate, TCPs and PCBs; the TFT array substrate including thereon bus lines connected with the TCPs, repair lines, and TFTs; the repair lines being provided on a periphery of the TFT array substrate by means of divisional exposure, wherein the repair lines are provided in such a manner that at least two of the same line patterns are repeated.
    Type: Grant
    Filed: August 28, 1997
    Date of Patent: February 8, 2000
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Satoru Kawamoto, Yoshinori Numano, Ken Nakasima
  • Patent number: 5838037
    Abstract: A TFT-array including a substrate, a gate electrode, a first and second electrode provided on the substrate simultaneously with the gate electrode, an insulating film formed on the gate electrode, the first and the second electrode, a semiconductor layer formed on the gate electrode in such a manner that the insulating film is interposed between the semiconductor layer and the gate electrode, a pair of electrodes, either of which is connected with the first electrode or the second electrode, said pair of electrodes defining a semiconductor element together with the semiconductor layer.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: November 17, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yuichi Masutani, Yoshinori Numano, Kazuhiro Kobayashi
  • Patent number: 4909585
    Abstract: In an optical communications apparatus of one office having a light sending device which has a plurality of coupling ends adapted to be coupled with a light transmitting optical fiber for connecting individual offices and which sends a transmission signal in the form of light, and a light receiving device which receives a light signal; an optical communications apparatus comprising light sending means connecting the respective coupling ends and the light sending device through optical fibers, light receiving means connecting the respective coupling ends and the light receiving device through optical fibers, and pass-through means for passing the light signals between the coupling ends.
    Type: Grant
    Filed: October 28, 1988
    Date of Patent: March 20, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Toyohiro Kobayashi, Shoji Mukohara, Tatsunao Hayashida, Yoshinori Numano, Toshiyasu Higuma
  • Patent number: 4889983
    Abstract: An image sensor includes an amorphous silicon photodiode on an insulating substrate, an amorphous silicon thin film transistor disposed on the same substrate for reading out charges stored by said photodiode, and a wiring film as a source/drain electrode of said transistor and as a first electrode of the photodiode free of steps. The image sensor may include a matrix wiring section for taking out signals, a silicon film including a channel protection film for the transistor, an insulating film for the matrix wiring, and a second conductor of the matrix wiring connected with the source/drain electrode of the transistor and arranged in a direction generally normal to the source/drain electrode and disposed on the wiring film.
    Type: Grant
    Filed: November 22, 1988
    Date of Patent: December 26, 1989
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshinori Numano, Masahiro Hayama