Patents by Inventor Yoshinori Okuda

Yoshinori Okuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICE
    Publication number: 20240105834
    Abstract: A semiconductor device includes: a semiconductor region of a first conductivity type having a main surface; a capacitor region of a second conductivity type formed in a surface layer portion of the main surface; and at least one trench structure including a trench formed in the main surface to penetrate the capacitor region, an insulating film covering a wall surface of the trench, and embedded electrodes embedded in the trench so as to form capacitive coupling with the capacitor region through the insulating film.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 28, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Hajime OKUDA, Yoshinori FUKUDA, Adrian JOITA, Toru TAKUMA
  • Message writing apparatus, message writing method, message readout apparatus, message readout method, memory address control circuit for writing of variable-length message and memory address control circuit for readout of variable-length message
    Patent number: 7450594
    Abstract: In multi-connections, a message writing apparatus is provided. This message writing apparatus (21) comprises a path recognizing section (21a), a received message assembling section (21b), a receive control section (21c), an arbitrating section (21d) and an external memory control section (21e). When a received ATM cell is written/readout in/from a receiving buffer, it is written/read out in a memory area corresponding to each path, which enables the processing of AAL5 messages from a plurality of paths and improves the transfer processing capability, thereby leading to realizing a shortening of the data transfer time.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: November 11, 2008
    Assignee: Fujitsu Limited
    Inventors: Akira Yamamori, Takeshi Sasaki, Eiji Maeda, Masao Maeda, Tatsuya Oku, Yoshinori Okuda, Tsuguo Okada, Akihiro Yasuo, Jinichi Yoshizawa
  • Message writing apparatus, message writing method, message readout apparatus, message readout method, memory address control circuit for writing of variable-length message and memory address control circuit for readout of variable-length message
    Publication number: 20020057697
    Abstract: In multi-connections, a message writing apparatus is provided. This message writing apparatus (21) comprises a path recognizing section (21a), a received message assembling section (21b), a receive control section (21c), arbitrating section (21d) and an external memory control section (21e). When a received ATM cell is written/readout in/from a receiving buffer, it is written/read out in a memory area corresponding to each path, which enables the processing of AAL5 messages from a plurality of paths and improves the transfer processing capability, thereby leading to realizing a shortening of the data transfer time.
    Type: Application
    Filed: November 9, 2001
    Publication date: May 16, 2002
    Inventors: Akira Yamamori, Takeshi Sasaki, Eiji Maeda, Masao Maeda, Tatsuya Oku, Yoshinori Okuda, Tsuguo Okada, Akihiro Yasuo, Jinichi Yoshizawa